相关论文: Fault Tolerant Synthesis of Reversible Circuits

Conventional approaches to fault-tolerant quantum computing realize logical circuits gate-by-gate, synthesizing each gate independently on one or more code blocks. This incurs excess overhead and doesn't leverage common structures in…

Fault tolerance overhead of high performance computing (HPC) applications is becoming critical to the efficient utilization of HPC systems at large scale. HPC applications typically tolerate fail-stop failures by checkpointing. Another…

Fault-tolerant quantum computation using quantum error-correcting codes requires fault-tolerant constructions of nontransversal gates. Shor proposed a fault-tolerant construction of a nontransversal gate, i.e., the Toffoli gate for a family…

Understanding the physics of strongly correlated materials is one of the grand challenge problems for physics today. A large class of scientifically interesting materials, from high-$T_c$ superconductors to spin liquids, involve medium to…

Quantum error correction is necessary to perform large-scale quantum computations in the presence of noise and decoherence. As a result, several aspects of quantum error correction have already been explored. These have been primarily…

Fault-tolerant logic gates will consume a large proportion of the resources of a two-dimensional quantum computing architecture. Here we show how to perform a fault-tolerant non-Clifford gate with the surface code; a quantum…

Fault tolerance is widely regarded as indispensable for achieving scalable and reliable quantum computing. However, the spacetime overhead required for fault-tolerant quantum computating remains prohibitively large. A critical challenge…

We present a quantum circuit synthesis algorithm for implementing universal fault-tolerant quantum computing based on concatenated codes. To realize fault-tolerant quantum computing, the fault-tolerant quantum protocols should be…

This is an introduction to software methods of quantum fault tolerance. Broadly speaking, these methods describe strategies for using the noisy hardware components of a quantum computer to perform computations while continually monitoring…

Realizing computationally complex quantum circuits in the presence of noise and imperfections is a challenging task. While fault-tolerant quantum computing provides a route to reducing noise, it requires a large overhead for generic…

In this paper, reversible circuits consisting of NOT, CNOT and 2-CNOT gates are studied. Several asymptotically optimal by the order of magnitude synthesis methods are described. Some circuit's complexity reduction approaches are…

Reversible circuits for SR flip flop, JK flip flop, D flip flop, T flip flop, Master Slave D flip flop and Master Slave JK flip flop have been provided with three different logical approaches. All the circuits have been optimized with the…

In this paper we provide a basic introduction of the core ideas and theories surrounding fault-tolerant quantum computation. These concepts underly the theoretical framework of large-scale quantum computation and communications and are the…

If a Micro Processor Unit (MPU) receives an external electric signal as noise, the system function will freeze or malfunction easily. A new resilience strategy is implemented in order to reset the MPU automatically and stop the MPU from…

Fault-tolerant quantum computing requires gates which function correctly despite the presence of errors, and are scalable if the error probability-per-gate is below a threshold value. To date, no method has been described for calculating…

In fault-tolerant quantum computing, errors in unitary gate synthesis is comparable with noise inherent in the gates themselves. While mixed synthesis can suppress such coherent errors quadratically, there is no clear understanding on its…

Many proposals for fault tolerant quantum computation (FTQC) suffer detectable loss processes. Here we show that topological FTQC schemes, which are known to have high error thresholds, are also extremely robust against losses. We…

Power dissipation is known as the most notable limiting factor in all nano-electronic design techniques including Quantum-dot Cellular Automata (QCA). The familiar reversible computing approach is used as a reasonably reliable solution,…

Reversible logic circuit is a necessary construction for achieving ultra low power dissipation as well as for prominent post-CMOS computing technologies such as Quantum computing. Consequently automatic synthesis of a Boolean function using…

Fabrication-less design houses outsource their designs to 3rd party foundries to lower fabrication cost. However, this creates opportunities for a rogue in the foundry to introduce hardware Trojans, which stay inactive most of the time and…