Modeling and simulation of multiprocessor systems MPSoC by SystemC/TLM2
Abstract
The current manufacturing technology allows the integration of a complex multiprocessor system on one piece of silicon (MPSoC for Multiprocessor System-on- Chip). One way to manage the growing complexity of these systems is to increase the level of abstraction and to address the system-level design. In this paper, we focus on the implementation in SystemC language with TLM (Transaction Level Model) to model an MPSOC platform. Our main contribution is to define a comprehensive, fast and accurate method for designing and evaluating performance for MPSoC systems. The studied MPSoC is composed of MicroBlaze microprocessors, memory, a timer, a VGA and an interrupt handler with two examples of software. This paper has two novel contributions: the first is to develop this MPSOC at CABA and TLM for ISS (Instruction Set Simulator), Native simulations and timed Programmer s View (PV+T); the second is to show that with PV+T simulations we can achieve timing fidelity with higher speeds than CABA simulations and have almost the same precision.
Cite
@article{arxiv.1408.0982,
title = {Modeling and simulation of multiprocessor systems MPSoC by SystemC/TLM2},
author = {Abdelhakim Alali and Ismail Assayad and Mohamed Sadik},
journal= {arXiv preprint arXiv:1408.0982},
year = {2014}
}