English

Functional Specification of the RAVENS Neuroprocessor

Neural and Evolutionary Computing 2023-07-31 v1

Abstract

RAVENS is a neuroprocessor that has been developed by the TENNLab research group at the University of Tennessee. Its main focus has been as a vehicle for chip design with memristive elements; however it has also been the vehicle for all-digital CMOS development, plus it has implementations on FPGA's, microcontrollers and software simulation. The software simulation is supported by the TENNLab neuromorphic software framework so that researchers may develop RAVENS solutions for a variety of neuromorphic computing applications. This document provides a functional specification of RAVENS that should apply to all implementations of the RAVENS neuroprocessor.

Cite

@article{arxiv.2307.15232,
  title  = {Functional Specification of the RAVENS Neuroprocessor},
  author = {Adam Z. Foshie and James S. Plank and Garrett S. Rose and Catherine D. Schuman},
  journal= {arXiv preprint arXiv:2307.15232},
  year   = {2023}
}

Comments

17 pages, 11 figures

R2 v1 2026-06-28T11:42:26.144Z