Related papers: Architecture-aware Unitary Synthesis
Error mitigation schemes and error-correcting codes have been the center of much effort in quantum information processing research over the last few decades. While most of the successful proposed schemes for error mitigation are…
Fault-tolerant quantum computers compose elements of a discrete gate set in order to approximate a target unitary. The problem of minimising the number of gates is known as gate-synthesis. The approximation error is a form of coherent…
Dissipative cat qubits are a promising physical platform for quantum computing, since their large noise bias can enable more hardware-efficient quantum error correction. In this work we theoretically study the long-term prospects of a…
The transmon, known for its fast operation time and the coherence time of tens of microseconds, is the most commonly used qubit for superconducting quantum processors. However, it is still necessary to enhance the coherence time and the…
During the noisy intermediate-scale quantum (NISQ) era, it is important to optimize the quantum circuits in circuit depth and gate count, especially entanglement gates, including the CNOT gate. Among all the unitary operators, diagonal…
As quantum computing advances toward fault-tolerance through quantum error correction, modular chiplet architectures have emerged to provide the massive qubit counts required while overcoming fabrication limits of monolithic chips. However,…
An unknown unitary gates, which is secretly chosen from several known ones, can always be distinguished perfectly. In this paper, we implement such a task on IBM's quantum processor. More precisely, we experimentally demonstrate the…
High-fidelity logical \emph{T}-gate realization constitutes a core prerequisite for large-scale fault-tolerant quantum computing. However, conventional magic state distillation requires massive physical qubit overhead across successive…
Achieving practical quantum advantage on fault-tolerant quantum computers (FTQC) is fundamentally constrained by the substantial spatial and temporal overheads required to map logical operations onto physical hardware. Existing compilation…
Superconducting quantum processors have largely converged on transmon-based architectures, while alternative qubit modalities with intrinsic error protection have lacked a demonstrated path to scalable system integration. In particular,…
Running quantum programs is fraught with challenges on on today's noisy intermediate scale quantum (NISQ) devices. Many of these challenges originate from the error characteristics that stem from rapid decoherence and noise during…
Current quantum devices have unutilized high-level quantum resources. More and more attention has been paid to the qudit quantum systems with larger than two dimensions to maximize the potential computing power of quantum computation. Then,…
Quantum algorithm design usually assumes access to a perfect quantum computer with ideal properties like full connectivity, noise-freedom and arbitrarily long coherence time. In Noisy Intermediate-Scale Quantum (NISQ) devices, however, the…
The primary objective of quantum circuit synthesis is to efficiently and accurately realize specific quantum algorithms or operations utilizing a predefined set of quantum gates, while also optimizing the circuit size. It holds a pivotal…
Variational quantum circuits (VQCs) are typically evaluated at the logical design level when analyzing trainability. However, execution on real quantum devices requires hardware-aware compilation (transpilation) to satisfy qubit…
Compiling quantum circuits to account for hardware restrictions is an essential part of the quantum computing stack. Circuit compilation allows us to adapt algorithm descriptions into a sequence of operations supported by real quantum…
We introduce an improved CNOT synthesis algorithm that considers nearest-neighbour interactions and CNOT gate error rates in noisy intermediate-scale quantum (NISQ) hardware. Compared to IBM's Qiskit compiler, it improves the fidelity of a…
With the growth of quantum platforms for gate-based quantum computation, compilation holds a crucial role in deciding the success of the implementation. While there has been rich research in compilation techniques for the…
Implementing a quantum circuit on specific hardware with a reduced available gate set is often associated with a substantial increase in the length of the equivalent circuit. This process is also known as transpilation and due to…
Compiling time-evolution operators of the form $U(t)=e^{-iHt}$ into hardware-native gate sequences is a central bottleneck for digital quantum simulation on noisy intermediate-scale quantum (NISQ) devices. Generic transpilation treats…