Related papers: Architecture-aware Unitary Synthesis
While all quantum algorithms can be expressed in terms of single-qubit and two-qubit gates, more expressive gate sets can help reduce the algorithmic depth. This is important in the presence of gate errors, especially those due to…
As systems for quantum computing keep growing in size and number of qubits, challenges in scaling the control capabilities are becoming increasingly relevant. Efficient schemes to simultaneously mediate coherent interactions between…
The design space of current quantum computers is expansive with no obvious winning solution. This leaves practitioners with a clear question: "What is the optimal system configuration to run an algorithm?". This paper explores hardware…
We propose and validate on real quantum computing hardware a new method for extended two-qubit gate set design, replacing iterative, fine calibration with fast characterization of a small number of gate parameters which are then tracked and…
We develop a systematic method of performing corrected gate operations on an array of exchange-coupled singlet-triplet qubits in the presence of both fluctuating nuclear Overhauser field gradients and charge noise. The single-qubit control…
We propose a method for decomposing continuous-variable operations into a universal gate set, without the use of any approximations. We fully characterize a set of transformations admitting exact decompositions and describe a process for…
While quantum computing holds great potential in combinatorial optimization, electronic structure calculation, and number theory, the current era of quantum computing is limited by noisy hardware. Many quantum compilation approaches can…
Native multi-qubit parity gates have various potential quantum computing applications, such as entanglement creation, logical state encoding and parity measurement in quantum error correction. Here, using simultaneous cross-resonance drives…
A large-scale quantum circuit can be partitioned into multiple subcircuits through circuit cutting, where each subcircuit is executed multiple times and the expectation value of the original circuit is reconstructed by classical…
Quantum hardware development is progressing rapidly with substantial advancements achieved across leading platforms, including superconducting circuits, trapped-ion systems, and neutral atom arrays. As the pursuit of practical quantum…
Quantum neural networks (QNNs) suffer from severe gate-level redundancy, which hinders their deployment on noisy intermediate-scale quantum (NISQ) devices. In this work, we propose q-iPrune, a one-shot structured pruning framework grounded…
Quantum circuit synthesis describes the process of converting arbitrary unitary operations into a gate sequence of a fixed universal gate set, usually defined by the operations native to a given hardware platform. Most current synthesis…
We present a method for optimizing quantum circuit compilation by automating the allocation of auxiliary qubits for multi-qubit gate decompositions. This approach is implemented and evaluated within the high-level quantum programming…
This study introduces a superconducting quantum chip architecture designed to simultaneously preserve entanglement and readout fidelity, addressing one of the key trade-offs in the development of scalable quantum hardware. In conventional…
Using error correcting codes and fault tolerant techniques, it is possible, at least in theory, to produce logical qubits with significantly lower error rates than the underlying physical qubits. Suppose, however, that the gates that act on…
We present a simple, malleable and low-overhead approach for improving generic biased quantum error mitigation (QEM) methods, achieving up to 15% fidelity improvements over standard QEM on 100-qubit circuits with up to 2000 entangling…
Matrix extensions have emerged as an essential feature in modern CPUs to address the surging demands of AI workloads. However, existing designs often incur substantial hardware and software design overhead. Tight coupling with the CPU…
We propose a unified Transformer-based architecture for wireless signal processing tasks, offering a low-latency, task-adaptive alternative to conventional receiver pipelines. Unlike traditional modular designs, our model integrates channel…
With improved gate calibrations reducing unitary errors, we achieve a benchmarked single-qubit gate fidelity of 99.95% with superconducting qubits in a circuit quantum electrodynamics system. We present a method for distinguishing between…
High-fidelity multi-qubit gates are a critical resource for near-term quantum computing, as they underpin the execution of both quantum algorithms and fault-tolerant protocols. The Toffoli gate (CCNOT), in particular, plays a central role…