Related papers: The completed High-Low method for interface state …
We determined the interface state density ($D_{\rm it}$) distributions in the vicinity of the conduction band edge in silicon carbide (SiC) metal-oxide-semiconductor (MOS) structures by reproducing the experimental current-voltage…
We report that annealing in low-oxygen-partial-pressure (low-p$_{\rm O2}$) ambient is effective in reducing the interface state density (D$_{\rm IT}$) at a SiC (0001)/SiO$_{\rm 2}$ interface near the conduction band edge (E$_{\rm C}$) of…
The presence of interface states at the MOS interface is a well-known cause of device degradation. This is particularly true for ultra-scaled FinFET geometries where the presence of a few traps can strongly influence device behavior.…
This article is present the effected oxide capacitor in CMOS structure of integrated circuit level 5 micrometer technology. It has designed and basic structure of MOS diode. It establish with aluminum metallization layer by sputtering…
Novel electronic systems forming at oxide interfaces comprise a class of new materials with a wide array of potential applications. A high mobility electron system forms at the LaAlO$_3$/SrTiO$_3$ interface and, strikingly, both…
First-principles simulations of electronic properties of hybrid inorganic/organic interfaces are challenging, as common density-functional theory (DFT) approximations target specific material classes like bulk semiconductors or gas-phase…
Two-dimensional (2D) layered materials are promising for replacing Si to overcome the scaling limit of recent ~5 nm-length metal-oxide-semiconductor field-effect transistors (MOSFETs). However, the insulator/2D channel interface severely…
The effects of the oxidation atmosphere and crystal faces on the interface-trap density was examined by using constant-capacitance deep-level transient spectroscopy to clarify the origin of them. By comparing the DLTS spectra of the…
Surface damage caused by ionizing radiation in SiO$_2$ passivated silicon particle detectors consists mainly of the accumulation of a positively charged layer along with trapped-oxide-charge and interface traps inside the oxide and close to…
We report electronic transport on n-type silicon Single Electron Transistors (SETs) fabricated in Complementary Metal Oxide Semiconductor (CMOS) technology. The n-MOSSETs are built within a pre-industrial Fully Depleted Silicon On Insulator…
A common issue in low temperature measurements of enhancement-mode metal-oxide-semiconductor (MOS) field-effect transistors (FETs) in the low electron density regime is the high contact resistance dominating the device impedance. In that…
Although MoS2 field-effect transistors (FETs) with high-k dielectrics are promising for electron device applications, the underlying physical origin of interface degradation remains largely unexplored. Here, we present a systematic analysis…
This work presents a physics based compact model for SiC power MOSFETs that accurately describes the I-V characteristics up to large voltages and currents. Charge-based formulations accounting for the different physics of SiC power MOSFETs…
One of the biggest challenges impeding the progress of Metal-Oxide-Silicon (MOS) quantum dot devices is the presence of disorder at the Si/SiO$_2$ interface which interferes with controllably confining single and few electrons. In this work…
The role of interface states and dielectric mismatch is studied in ultrathin P-doped silicon-on-insulator (SOI) films with thickness of the device layer ($H_{SOI}$) varying from 30 to 8 nm and dopant concentration ($n_{D}$) ranging from…
The Si/SiO$_2$ interface is populated by isolated trap states which modify its electronic properties. These traps are of critical interest for the development of semiconductor-based quantum sensors and computers, as well as nanoelectronic…
The coherence and fidelity of quantum dot (QD) spin qubits are fundamentally limited by charge noise arising from electrically active trap states at oxide interfaces, heterostructure boundaries, and within the bulk semiconductor. These…
Channel conductance measurements can be used as a tool to study thermally activated electron transport in the sub-threshold region of state-of-art FinFETs. Together with theoretical Tight-Binding (TB) calculations, this technique can be…
The barrier formation for metal/organic semiconductor interfaces is analyzed within the Induced Density of Interface States (IDIS) model. Using weak chemisorption theory, we calculate the induced density of states in the organic energy gap…
When transistor gate insulators have nanometer-scale equivalent oxide thickness (EOT), the gate capacitance ($C_\textrm{G}$) becomes smaller than the oxide capacitance ($C_\textrm{ox}$) due to the quantum capacitance and charge centroid…