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As metal-oxide-semiconductor field-effect transistors (MOSFET) channel lengths (Lg) are scaled to lengths shorter than Lg<8 nm source-drain tunneling starts to become a major performance limiting factor. In this scenario a heavier transport…

This paper addresses the question of whether a ``rigid molecule'' (one which does not deform in an external field) used as the conducting channel in a standard three-terminal MOSFET configuration can offer any performance advantage relative…

We report the fabrication and study of Hall bar MOSFET devices in which an overlapping-gate architecture allows four-terminal measurements of low-density 2D electron systems, while maintaining a high density at the ohmic contacts.…

Traditional transistors based on complementary metal-oxide-semiconductor (CMOS) and metal-oxide-semiconductor field-effect transistors (MOSFETs) are facing significant limitations as device scaling reaches the limits of Moore's Law. These…

We performed a comprehensive scaling study of Schottky barrier carbon nanotube transistors using self-consistent, atomistic scale simulations. We restrict our attention to Schottky barrier carbon nanotube FETs whose metal source/drain is…

Oxide semiconductors have emerged as common channel materials in transistors and hold promise for next-generation electronics, yet achieving high mobility typically requires costly vacuum-based techniques. Here, ultrathin (5-nm) indium…

The development of high-performance multifunctional polymer-based electronic circuits is a major step towards future flexible electronics. Here, we demonstrate a tunable approach to fabricate such devices based on rationally designed…

We examine the effect of an FET geometry on the charge ordering phase diagram of transition metal oxides using numerical simulations of a semiclassical model including long-range Coulomb fields, resulting in nanoscale pattern formation. We…

The controlled fabrication of actively switchable atomic-scale devices, in particular transistors, has remained elusive to date. Here we explain operation of an atomic-scale three-terminal device by a novel switching mechanism of bistable,…

A common issue in low temperature measurements of enhancement-mode metal-oxide-semiconductor (MOS) field-effect transistors (FETs) in the low electron density regime is the high contact resistance dominating the device impedance. In that…

Two-dimensional (2D) materials are among the most promising candidates for next-generation electronics due to their atomic thinness, allowing for flexible transparent electronics and ultimate length scaling. Thus far, atomically-thin p-n…

A new nano-lithography technique compatible with conducting oxide interfaces, which requires a single lithographic step with no additional amorphous layer deposition or etching, is presented. It is demonstrated on SrTiO3/LaAlO3 interface…

To improve transistor density and electronic performance, next-generation semiconductor devices are adopting three-dimensional architectures and feature sizes down to the few-nm regime, which require atomic-scale metrology to identify and…

Aside from recent advances in artificial intelligence (AI) models, specialized AI hardware is crucial to address large volumes of unstructured and dynamic data. Hardware-based AI, built on conventional complementary metal-oxidesemiconductor…

With decreasing device dimensions, the performance of carbon nanotube field-effect transistors (CNFETs) is limited by high Off currents except at low drain voltages. We show that an asymmetric design improves the performance, reducing Off…

We demonstrate that by means of a local top-gate current oscillations can be observed in extended, monolayered films assembled from monodisperse metal nanocrystals -- realizing transistor function. The oscillations in this metal-based…

Electrons floating on the surface of superfluid helium have been suggested as promising mobile spin quantum bits (qubits). Transferring electrons extremely efficiently in a narrow channel structure with underlying gates has been…

The lifetime of superconducting qubits is limited by dielectric loss, and a major source of dielectric loss is the native oxide present at the surface of the superconducting metal. Specifically, tantalum-based superconducting qubits have…

The native oxide at the surface of III-V nanowires, such as InAs, can be a major source of charge noise and scattering in nanowire-based electronics, particularly for quantum devices operated at low temperatures. Surface passivation…

In this paper, we present the unique features exhibited by modified asymmetrical Double Gate (DG) silicon on insulator (SOI) MOSFET. The proposed structure is similar to that of the asymmetrical DG SOI MOSFET with the exception that the…