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Related papers: HiVeGen -- Hierarchical LLM-based Verilog Generati…

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Rapid advances in language models (LMs) have created new opportunities for automated code generation while complicating trade-offs between model characteristics and prompt design choices. In this work, we provide an empirical map of recent…

Hardware Architecture · Computer Science 2026-04-14 Luca Collini , Andrew Hennesee , Patrick Yubeaton , Siddharth Garg , Ramesh Karri

This paper investigates the use of Large Language Models (LLMs) and natural language prompts to generate hardware description code, namely Verilog. Building on our prior work, we employ OpenAI's ChatGPT4 and natural language prompts to…

Hardware Architecture · Computer Science 2024-12-12 Paola Vitolo , George Psaltakis , Michael Tomlinson , Gian Domenico Licciardo , Andreas G. Andreou

Traditionally, digital hardware designs are written in the Verilog hardware description language (HDL) and debugged manually by engineers. This can be time-consuming and error-prone for complex designs. Large Language Models (LLMs) are…

Hardware Architecture · Computer Science 2025-03-06 Jason Blocklove , Shailja Thakur , Benjamin Tan , Hammond Pearce , Siddharth Garg , Ramesh Karri

Large Language Models (LLMs) have become extremely potent instruments with exceptional capacities for comprehending and producing human-like text in a wide range of applications. However, the increasing size and complexity of LLMs present…

Machine Learning · Computer Science 2024-06-18 Yingbing Huang , Lily Jiaxin Wan , Hanchen Ye , Manvi Jha , Jinghua Wang , Yuhong Li , Xiaofan Zhang , Deming Chen

The increasing complexity and scale of Deep Neural Networks (DNNs) necessitate specialized tensor accelerators, such as Tensor Processing Units (TPUs), to meet various computational and energy efficiency requirements. Nevertheless,…

Hardware Architecture · Computer Science 2025-03-11 Deepak Vungarala , Mohammed E. Elbtity , Sumiya Syed , Sakila Alam , Kartik Pandit , Arnob Ghosh , Ramtin Zand , Shaahin Angizi

Large Language Models (LLMs) have become increasingly popular for generating RTL code. However, producing error-free RTL code in a zero-shot setting remains highly challenging for even state-of-the-art LLMs, often leading to issues that…

Hardware Architecture · Computer Science 2024-12-09 Mubashir ul Islam , Humza Sami , Pierre-Emmanuel Gaillardon , Valerio Tenace

Despite numerous applications for fine-grained corpus analysis, researchers continue to rely on manual labeling, which does not scale, or statistical tools like topic modeling, which are difficult to control. We propose that LLMs have the…

Computation and Language · Computer Science 2025-09-23 Mian Zhong , Pristina Wang , Anjalie Field

Hardware generation languages (HGLs) increase hardware design productivity by creating parameterized modules and test benches. Unfortunately, existing tools are not widely adopted due to several demerits, including limited support for…

Hardware Architecture · Computer Science 2023-09-12 Jintao Sun , Zeke Wang , Tao Lu , Wenzhi Chen

Hyperdimensional Computing (HDC), a technique inspired by cognitive models of computation, has been proposed as an efficient and robust alternative basis for machine learning. HDC programs are often manually written in low-level and target…

While Large Language Models (LLMs) show significant potential in hardware engineering, current benchmarks suffer from saturation and limited task diversity, failing to reflect LLMs' performance in real industrial workflows. To address this…

Artificial Intelligence · Computer Science 2026-02-03 Zhongkai Yu , Chenyang Zhou , Yichen Lin , Hejia Zhang , Haotian Ye , Junxia Cui , Zaifeng Pan , Jishen Zhao , Yufei Ding

High-Level Synthesis (HLS) is emerging as a mainstream design methodology, allowing software designers to enjoy the benefits of a hardware implementation. Significant work has led to effective compilers that produce high-quality hardware…

Software Engineering · Computer Science 2015-08-28 Jeffrey Goeders , Steven J. E. Wilton

High-Level Synthesis (HLS) improves IC development productivity by enabling hardware design from C-like languages. However, strict coding constraints and design-specific optimizations limit its widespread adoption. While recent efforts…

Hardware Architecture · Computer Science 2026-04-22 Runkai Li , Jia Xiong , Xiuyuan He , Jieru Zhao , Jiaqi Lv , Haowen Fang , Lei Qi , Xi Wang

Recent advances in large language models have demonstrated their potential for automated generation of hardware description language (HDL) code from high-level prompts. Researchers have utilized fine-tuning to enhance the ability of these…

Natural language interfaces have exhibited considerable potential in the automation of Verilog generation derived from high-level specifications through the utilization of large language models, garnering significant attention.…

Hardware Architecture · Computer Science 2024-07-12 Kaiyan Chang , Zhirong Chen , Yunhao Zhou , Wenlong Zhu , kun wang , Haobo Xu , Cangyuan Li , Mengdi Wang , Shengwen Liang , Huawei Li , Yinhe Han , Ying Wang

Large Language Models (LLMs) have shown strong potential in accelerating digital hardware design through automated code generation. Yet, ensuring their reliability remains a critical challenge, as existing LLMs trained on massive…

Machine Learning · Computer Science 2025-12-08 Yiwen Liang , Qiufeng Li , Shikai Wang , Weidong Cao

Modern Integrated Circuits (ICs) are becoming increasingly complex, and so is their development process. Hardware design verification entails a methodical and disciplined approach to the planning, development, execution, and sign-off of…

Recent advances in diffusion models have demonstrated impressive capability in generating high-quality images for simple prompts. However, when confronted with complex prompts involving multiple objects and hierarchical structures, existing…

Computer Vision and Pattern Recognition · Computer Science 2025-11-26 Hongji Yang , Yucheng Zhou , Wencheng Han , Runzhou Tao , Zhongying Qiu , Jianfei Yang , Jianbing Shen

The rapid scaling of large language model (LLM) training and inference has driven their adoption in semiconductor design across academia and industry. While most prior work evaluates LLMs on hardware description language (HDL) tasks,…

Hardware Architecture · Computer Science 2025-10-27 Stefan Abi-Karam , Cong Hao

High-level synthesis (HLS) has been widely adopted as it significantly improves the hardware design productivity and enables efficient design space exploration (DSE). Existing HLS tools are built using compiler infrastructures largely based…

Programming Languages · Computer Science 2021-12-23 Hanchen Ye , Cong Hao , Jianyi Cheng , Hyunmin Jeong , Jack Huang , Stephen Neuendorffer , Deming Chen
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