Related papers: A 5T-2MTJ STT-assisted Spin Orbit Torque based Ter…
In this paper, spin-orbit torque (SOT) magnetoresistive random-access memory (MRAM) devices are leveraged to realize sigmoidal neurons and binarized synapses for a single-cycle analog in-memory computing (IMC) architecture. First, an analog…
The discovery of spin torque transfer (STT) has lead to a significant advance in the development of spintronic devices. Novel structures and materials have been studied in order to improve the performance of the magnetic tunnel junctions…
Current-induced magnetization switching by spin-orbit torque (SOT) holds considerable promise for next generation ultralow-power memory and logic applications. In most cases, generation of spin-orbit torques has relied on an external…
A content addressable memory (CAM) is a type of memory that implements a parallel search engine at its core. A CAM takes as an input a value and outputs the address where this value is stored in case of a match. CAMs are used in a wide…
Spin-orbit torques (SOTs) from transition metal dichalcogenides systems (TMDs) in conjunction with ferromagnetic materials are recently attractive in spintronics for their versatile features. However, most of the previously studied…
3T TRAM with doping profile (P+PNPNN+) is experimentally demonstrated on a silicon photonic platform. By using additional implant layers, this device provides excellent memory performance compared to the conventional structure (PNPN). TCAD…
The realistic modeling of STT-MRAM for the simulations of hybrid CMOS/Spintronics devices in comprehensive simulation environments require a full description of stochastic switching processes in state of the art STT-MRAM. Here, we derive an…
Spin-polarized charge-currents induce magnetic tunnel junction (MTJ) switching by virtue of spin-transfer-torque (STT). Recently, by taking advantage of the spin dependent thermoelectric properties of magnetic materials, novel means of…
Ternary Deep Neural Networks (DNN) have shown a large potential for highly energy-constrained systems by virtue of their low power operation (due to ultra-low precision) with only a mild degradation in accuracy. To enable an…
High-resolution tunneling electron spin transport properties (longitudinal spin current (LSC) and spin transfer torque (STT) maps) of topologically distinct real-space magnetic skyrmionic textures are reported by employing a 3D-WKB combined…
As capacity and complexity of on-chip cache memory hierarchy increases, the service cost to the critical loads from Last Level Cache (LLC), which are frequently repeated, has become a major concern. The processor may stall for a…
As a promising alternative to the Von Neumann architecture, in-memory computing holds the promise of delivering high computing capacity while consuming low power. Content addressable memory (CAM) can implement pattern matching and distance…
In this paper, we propose a novel memory-centric scheme based on CMOS SRAM for acceleration of data intensive applications. Our proposal aims at dynamically increasing the on-chip memory storage capacity of SRAM arrays on-demand. The…
Current-induced spin torques are of great interest to manipulate the orientation of nanomagnets without applying external magnetic fields. They find direct application in non-volatile data storage and logic devices, and provide insight into…
Efficient generation of spin-orbit torques (SOTs) is central for the exciting field of spin-orbitronics. Platinum, the archetypal spin Hall material, has the potential to be an outstanding provider for spin-orbit torques due to its giant…
Spin-Transfer Torque Magnetic RAM (STT-MRAM) is known as the most promising replacement for SRAM technology in large Last-Level Caches (LLCs). Despite its high-density, non-volatility, near-zero leakage power, and immunity to radiation as…
Spin-orbit torque is a promising mechanism for writing magnetic memories, while field-effect transistors are the gold-standard device for logic operation. The spin-orbit torque field effect transistor (SOTFET) is a proposed device that…
Large-capacity Content Addressable Memory (CAM) is a key element in a wide variety of applications. The inevitable complexities of scaling MOS transistors introduce a major challenge in the realization of such systems. Convergence of…
Whereas contemporary Error Correcting Codes (ECC) designs occupy a significant fraction of total die area in chip-multiprocessors (CMPs), approaches to deal with the vulnerability increase of CMP architecture against Single Event Upsets…
Lattice-based cryptography (LBC) exploiting Learning with Errors (LWE) problems is a promising candidate for post-quantum cryptography. Number theoretic transform (NTT) is the latency- and energy- dominant process in the computation of LWE…