Related papers: Omni 3D: BEOL-Compatible 3D Logic with Omnipresent…

This work presents a novel monolithic 3D (M3D) FPGA architecture that leverages stackable back-end-of-line (BEOL) transistors to implement configuration memory and pass gates, significantly improving area, latency, and power efficiency. By…

In this work, we proposed a new 3D integration technology: the Flip 3D integration (F3D), consisting of the 3D transistor stacking, the 3D dual-sided interconnects, the 3D die-to-die stacking and the dual-sided Monolithic 3D (M3D). Based on…

Recently, we proposed a novel transistor architecture for 3D stacked FETs called Flip FET (FFET), featuring N/P transistors back-to-back stacked and dual-sided interconnects. With dual-sided power rails and signal tracks, FFET can achieve…

Layout camouflaging can protect the intellectual property of modern circuits. Most prior art, however, incurs excessive layout overheads and necessitates customization of active-device manufacturing processes, i.e., the front-end-of-line…

As the conventional scaling of logic devices comes to an end, functional wafer backside and 3D transistor stacking are consensus for next-generation logic technology, offering considerable design space extension for powers, signals or even…

Multiple-input multiple-output (MIMO) orthogonal frequency-division multiplexing (OFDM) systems rely on digital or hybrid digital and analog designs for beamforming against frequency-selective fading, which suffer from high hardware…

The growth in data generation necessitates efficient data processing technologies to address the von Neumann bottleneck in conventional computer architecture. Memory-driven computing, which integrates non-volatile memory (NVM) devices in a…

Stacked intelligent metasurfaces (SIMs), which integrate multiple programmable metasurface layers, have recently emerged as a promising technology for advanced wave-domain signal processing. SIMs benefit from flexible spatial…

Stacked intelligent metasurface (SIM) and dual-polarized SIM (DPSIM) enabled wave-domain signal processing have emerged as promising research directions for offloading baseband digital processing tasks and efficiently simplifying…

Performance optimization associated with optical modulators requires reasonably accurate predictive models for key figures of merit. Interleaved PN-junction topology offers the maximum mode/junction overlap and is the most efficient…

Two-dimensional (2D) phase-change materials (PCMs) with moderate transition barriers and distinctly contrasting properties are highly desirable for multifunctional devices, yet such systems remain scarce. Using first-principles…

Modern integrated circuits are essentially two-dimensional (2D). Partial three-dimensional (3D) integration and 3D-transistor-level integrated circuits have long been anticipated as routes to improve the performance, cost and size of…

Ultra-thin (UT) oxide semiconductors are promising candidates for back-end-of-line (BEOL) compatible transistors and monolithic three-dimensional integration. Experimentally, UT indium oxide (In$_2$O$_3$) field-effect transistors (FETs)…

This paper focuses on energy recycling in full-duplex (FD) relaying multiple-input-multiple-output orthogonal frequency division multiplexing (OFDM) communication. The loop self-interference (SI) due to full-duplexing is seen as an…

Layout camouflaging (LC) is a promising technique to protect chip design intellectual property (IP) from reverse engineers. Most prior art, however, cannot leverage the full potential of LC due to excessive overheads and/or their limited…

Three-dimensional integrated circuits promise power, performance, and footprint gains compared to their 2D counterparts, thanks to drastic reductions in the interconnects' length through their smaller form factor. We can leverage the…

Intimate integration of memory devices with logic transistors is a frontier challenge in computer hardware. This integration is essential for augmenting computational power concurrently with enhanced energy efficiency in big-data…

The Last Level Cache (LLC) is the processor's critical bridge between on-chip and off-chip memory levels - optimized for high density, high bandwidth, and low operation energy. To date, high-density (HD) SRAM has been the conventional…

Conventional digital beamforming for wideband multiuser orthogonal frequency-division multiplexing (OFDM) demands numerous power-hungry components, increasing hardware costs and complexity. By contrast, the stacked intelligent metasurfaces…

The resistance bottleneck in metal-interconnect scaling calls for new interconnect materials. This paper explores topological semimetals as a potential solution. After reviewing the desirable properties of topological semimetals for…