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Heterogeneous, multicore SoC architectures are a critical component of today's computing landscape. However, supporting both increasing heterogeneity and multicore execution are significant design challenges. Meanwhile, the growing RISC-V…

Hardware Architecture · Computer Science 2022-06-07 Joseph Zuckerman , Paolo Mantovani , Davide Giri , Luca P. Carloni

Recent announcements have shown the viability of end-to-end open-source (OS) Linux-capable RISC-V systems on chip (SoCs). However, practical application and software development platforms require efficient non-volatile storage, which is not…

Hardware Architecture · Computer Science 2026-03-13 Axel Vanoni , Philippe Sauter , Paul Scheffler , Anton Buchner , Micha Wehrli , Thomas Benz , Luca Benini

Open-source RISC-V cores are increasingly adopted in high-end embedded domains such as automotive, where maximizing instructions per cycle (IPC) is becoming critical. Building on the industry-supported open-source CVA6 core and its…

Open-source RISC-V cores are increasingly demanded in domains like automotive and space, where achieving high instructions per cycle (IPC) through superscalar and out-of-order (OoO) execution is crucial. However, high-performance…

Hardware Architecture · Computer Science 2025-06-02 Zexin Fu , Riccardo Tedeschi , Gianmarco Ottavi , Nils Wistoff , César Fuguet , Davide Rossi , Luca Benini

IoT applications are one of the driving forces in making systems energy and power-efficient, given their resource constraints. However, because of security, latency, and transmission, we advocate for local computing through multi-processor…

Hardware Architecture · Computer Science 2024-06-27 Anderson I. Silva , Altamiro Susin , Fernanda L. Kastensmidt , Antonio Carlos S. Beck , Jose Rodrigo Azambuja

The emergence of heterogeneity and domain-specific architectures targeting deep learning inference show great potential for enabling the deployment of modern CNNs on resource-constrained embedded platforms. A significant development is the…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-07-25 Dmitri Lyalikov

Endpoint devices for Internet-of-Things not only need to work under extremely tight power envelope of a few milliwatts, but also need to be flexible in their computing capabilities, from a few kOPS to GOPS. Near-threshold(NT) operation can…

Recent applications in the domain of near-sensor computing require the adoption of floating-point arithmetic to reconcile high precision results with a wide dynamic range. In this paper, we propose a multi-core computing cluster that…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-06-12 Fabio Montagna , Stefan Mach , Simone Benatti , Angelo Garofalo , Gianmarco Ottavi , Luca Benini , Davide Rossi , Giuseppe Tagliavini

Spiking Neural Networks (SNNs) have gained significant attention in edge computing due to their low power consumption and computational efficiency. However, existing implementations either use conventional System on Chip (SoC) architectures…

Hardware Architecture · Computer Science 2026-03-13 Kanishka Gunawardana , Sanka Peeris , Kavishka Rambukwella , Thamish Wanduragala , Saadia Jameel , Roshan Ragel , Isuru Nawinne

Achieving high performance, energy efficiency, and cost-effectiveness while maintaining architectural flexibility is a critical challenge in the development and deployment of edge AI devices. Monolithic SoC designs struggle with this…

Hardware Architecture · Computer Science 2026-04-08 Suhas Suresh Bharadwaj , Prerana Ramkumar

The increasing complexity of autonomous systems has driven a shift to integrated heterogeneous SoCs with real-time and safety demands. Ensuring deterministic WCETs and low-latency for critical tasks requires minimizing interference on…

Hardware Architecture · Computer Science 2025-04-09 Christopher Reinwardt , Robert Balas , Alessandro Ottaviano , Angelo Garofalo , Luca Benini

Virtualization is a key technology used in a wide range of applications, from cloud computing to embedded systems. Over the last few years, mainstream computer architectures were extended with hardware virtualization support, giving rise to…

Hardware Architecture · Computer Science 2023-08-07 Bruno Sá , Luca Valente , José Martins , Davide Rossi , Luca Benini , Sandro Pinto

Unlike traditional PCIe-based FPGA accelerators, heterogeneous SoC-FPGA devices provide tighter integrations between software running on CPUs and hardware accelerators. Modern heterogeneous SoC-FPGA platforms support multiple I/O cache…

Hardware Architecture · Computer Science 2019-08-06 Seung Won Min , Sitao Huang , Mohamed El-Hadedy , Jinjun Xiong , Deming Chen , Wen-mei Hwu

This paper presents BP-BedRock, the open-source cache coherence protocol and system implemented within the BlackParrot 64-bit RISC-V multicore processor. BP-BedRock implements the BedRock directory-based MOESIF cache coherence protocol and…

RISC-V is a promising open-source architecture primarily targeted for embedded systems. Programs compiled using the RISC-V toolchain can run bare-metal on the system, and, as such, can be vulnerable to several memory corruption…

Cryptography and Security · Computer Science 2021-05-19 Asmit De , Swaroop Ghosh

Modern data-driven applications expose limitations of von Neumann architectures - extensive data movement, low throughput, and poor energy efficiency. Accelerators improve performance but lack flexibility and require data transfers.…

Hardware Architecture · Computer Science 2025-04-09 Vincenzo Petrolo , Flavia Guella , Michele Caon , Pasquale Davide Schiavone , Guido Masera , Maurizio Martina

Heterogeneous systems increasingly rely on RISC-V cores as orchestration engines to manage data movement, synchronization, and scheduling across accelerators and reconfigurable fabrics. Conventional performance metrics, such as FLOPs,…

Hardware Architecture · Computer Science 2026-03-10 Dave Ojika , Projjal Gupta , Preethi Budi , Herman Lam , Shreya Mehrotra

The trend in industry is towards heterogeneous multicore processors (HMCs), including chips with CPUs and massively-threaded throughput-oriented processors (MTTOPs) such as GPUs. Although current homogeneous chips tightly couple the cores…

Hardware Architecture · Computer Science 2013-10-30 Blake A. Hechtman , Daniel J. Sorin

The complexity of automotive systems is increasing quickly due to the integration of novel functionalities such as assisted or autonomous driving. However, increasing complexity poses considerable challenges to the automotive supply chain…

Hardware Architecture · Computer Science 2023-07-11 Luca Cuomo , Claudio Scordino , Alessandro Ottaviano , Nils Wistoff , Robert Balas , Luca Benini , Errico Guidieri , Ida Maria Savino

In this work, we present the design and evaluation of a Processor Tracing System compliant with the RISC-V Efficient Trace specification for Instruction Branch Tracing. We integrate our system into the host domain of a state-of-the-art edge…

Hardware Architecture · Computer Science 2025-04-04 Umberto Laghi , Simone Manoni , Emanuele Parisi , Andrea Bartolini
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