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Elliptic curve cryptography (ECC) is widely used in security applications such as public key cryptography (PKC) and zero-knowledge proofs (ZKP). ECC is composed of modular arithmetic, where modular multiplication takes most of the…

Hardware Architecture · Computer Science 2024-02-23 Jonathan Ku , Junyao Zhang , Haoxuan Shan , Saichand Samudrala , Jiawen Wu , Qilin Zheng , Ziru Li , JV Rajendran , Yiran Chen

Recent dual in-line memory modules (DIMMs) are starting to support processing-in-memory (PIM) by associating their memory banks with processing elements (PEs), allowing applications to overcome the data movement bottleneck by offloading…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-04-16 Si Ung Noh , Junguk Hong , Chaemin Lim , Seongyeon Park , Jeehyun Kim , Hanjun Kim , Youngsok Kim , Jinho Lee

Processing-in-memory (PIM) has been explored for decades by computer architects, yet it has never seen the light of day in real-world products due to their high design overheads and lack of a killer application. With the advent of critical…

Hardware Architecture · Computer Science 2024-03-08 Bongjoon Hyun , Taehun Kim , Dongjae Lee , Minsoo Rhu

In this paper, we present GradPIM, a processing-in-memory architecture which accelerates parameter updates of deep neural networks training. As one of processing-in-memory techniques that could be realized in the near future, we propose an…

Machine Learning · Computer Science 2021-02-16 Heesu Kim , Hanmin Park , Taehyun Kim , Kwanheum Cho , Eojin Lee , Soojung Ryu , Hyuk-Jae Lee , Kiyoung Choi , Jinho Lee

Processing-in-memory (PIM) seeks to eliminate computation/memory data transfer using devices that support both storage and logic. Stateful logic techniques such as IMPLY, MAGIC and FELIX can perform logic gates within memristive crossbar…

Hardware Architecture · Computer Science 2021-09-21 Orian Leitersdorf , Ronny Ronen , Shahar Kvatinsky

Processing large numbers of key/value lookups is an integral part of modern server databases and other "Big Data" applications. Prior work has shown that hash table based key/value lookups can benefit significantly from using a dedicated…

Hardware Architecture · Computer Science 2021-05-17 Joshua Landgraf , Scott Lloyd , Maya Gokhale

Particle-in-Cell (PIC) simulations are fundamental to plasma physics but often suffer from limited scalability due to particle-grid interaction bottlenecks and particle redistribution costs. Specifically, the particle-grid interaction…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-04-22 Yizhuo Rao , Xingjian Cui , Shangzhi Pang , Jiabin Xie , Guangnan Feng , Jinhui Wei , Ziyan Zhang , Languang Gao , Zhenyu Wang , Zhiguang Chen , Yutong Lu

In-memory-computing is emerging as an efficient hardware paradigm for deep neural network accelerators at the edge, enabling to break the memory wall and exploit massive computational parallelism. Two design models have surged: analog…

Hardware Architecture · Computer Science 2023-05-31 Pouya Houshmand , Jiacong Sun , Marian Verhelst

This paper presents PRIMAL, a processing-in-memory (PIM) based large language model (LLM) inference accelerator with low-rank adaptation (LoRA). PRIMAL integrates heterogeneous PIM processing elements (PEs), interconnected by 2D-mesh…

Hardware Architecture · Computer Science 2026-01-21 Yue Jiet Chong , Yimin Wang , Zhen Wu , Xuanyao Fong

Deep Neural Networks (DNNs) have transformed the field of machine learning and are widely deployed in many applications involving image, video, speech and natural language processing. The increasing compute demands of DNNs have been widely…

Machine Learning · Computer Science 2021-08-17 Sourjya Roy , Mustafa Ali , Anand Raghunathan

The IBM Neural Computer (INC) is a highly flexible, re-configurable parallel processing system that is intended as a research and development platform for emerging machine intelligence algorithms and computational neuroscience. It consists…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-03-26 Pritish Narayanan , Charles E. Cox , Alexis Asseman , Nicolas Antoine , Harald Huels , Winfried W. Wilcke , Ahmet S. Ozcan

Graph pattern mining applications try to find all embeddings that match specific patterns. Compared to the traditional graph computation, graph mining applications are computation-intensive. The state-of-the-art method, pattern enumeration,…

Hardware Architecture · Computer Science 2021-04-20 Gengyu Rao , Jingji Chen , Jason Yik , Xuehai Qian

With the continuously increasing integration level, manycore processor systems are likely to be the coming system structure not only in HPC but also for desktop or mobile systems. Nowadays manycore processors like Tilera TILE, KALRAY MPPA…

Distributed, Parallel, and Cluster Computing · Computer Science 2014-05-14 Oliver Mattes , Wolfgang Karl

Due to the very rapidly growing use of Artificial Neural Networks (ANNs) in real-world applications related to machine learning and Artificial Intelligence (AI), several hardware accelerator de-signs for ANNs have been proposed recently. In…

Hardware Architecture · Computer Science 2021-03-09 Supreeth Mysore Shivanandamurthy , Ishan. G. Thakkar , Sayed Ahmad Salehi

Analog compute-in-memory (CIM) in static random-access memory (SRAM) is promising for accelerating deep learning inference by circumventing the memory wall and exploiting ultra-efficient analog low-precision arithmetic. Latest analog CIM…

Hardware Architecture · Computer Science 2024-07-19 Zhiyu Chen , Ziyuan Wen , Weier Wan , Akhil Reddy Pakala , Yiwei Zou , Wei-Chen Wei , Zengyi Li , Yubei Chen , Kaiyuan Yang

Prior work on Automatically Scalable Computation (ASC) suggests that it is possible to parallelize sequential computation by building a model of whole-program execution, using that model to predict future computations, and then…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-09-21 Peter Kraft , Amos Waterland , Daniel Y Fu , Anitha Gollamudi , Shai Szulanski , Margo Seltzer

In-memory computing (IMC) on a monolithic chip for deep learning faces dramatic challenges on area, yield, and on-chip interconnection cost due to the ever-increasing model sizes. 2.5D integration or chiplet-based architectures interconnect…

Machine Learning · Computer Science 2021-08-23 Gokul Krishnan , Sumit K. Mandal , Manvitha Pannala , Chaitali Chakrabarti , Jae-sun Seo , Umit Y. Ogras , Yu Cao

Compute-in-memory (CIM) accelerators for spiking neural networks (SNNs) are promising solutions to enable $\mu$s-level inference latency and ultra-low energy in edge vision applications. Yet, their current lack of flexibility at both the…

Hardware Architecture · Computer Science 2024-10-31 Nicolas Chauvaux , Adrian Kneip , Christoph Posch , Kofi Makinwa , Charlotte Frenkel

High-performance computing systems are moving towards 2.5D and 3D memory hierarchies, based on High Bandwidth Memory (HBM) and Hybrid Memory Cube (HMC) to mitigate the main memory bottlenecks. This trend is also creating new opportunities…

Hardware Architecture · Computer Science 2017-09-26 Erfan Azarkhish , Davide Rossi , Igor Loi , Luca Benini

A modern graphics processing unit (GPU) is able to perform massively parallel scientific computations at low cost. We extend our implementation of the checkerboard algorithm for the two dimensional Ising model [T. Preis et al., J. Comp.…

Computational Physics · Physics 2010-07-22 Benjamin Block , Peter Virnau , Tobias Preis