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We present shared-memory parallel methods for Maximal Clique Enumeration (MCE) from a graph. MCE is a fundamental and well-studied graph analytics task, and is a widely used primitive for identifying dense structures in a graph. Due to its…

Data Structures and Algorithms · Computer Science 2020-01-30 Apurba Das , Seyed-Vahid Sanei-Mehri , Srikanta Tirthapura

Graph mining applications, such as subgraph pattern matching and mining, are widely used in real-world domains such as bioinformatics, social network analysis, and computer vision. Such applications are considered a new class of…

Hardware Architecture · Computer Science 2023-06-21 Jiya Su , Peng Jiang , Rujia Wang

Edge computing is a popular target for accelerating machine learning algorithms supporting mobile devices without requiring the communication latencies to handle them in the cloud. Edge deployments of machine learning primarily consider…

Hardware Architecture · Computer Science 2024-10-28 Sébastien Ollivier , Sheng Li , Yue Tang , Chayanika Chaudhuri , Peipei Zhou , Xulong Tang , Jingtong Hu , Alex K. Jones

Non-volatile main memory (NVRAM) technologies provide an attractive set of features for large-scale graph analytics, including byte-addressability, low idle power, and improved memory-density. NVRAM systems today have an order of magnitude…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-06-01 Laxman Dhulipala , Charlie McGuffey , Hongbo Kang , Yan Gu , Guy E. Blelloch , Phillip B. Gibbons , Julian Shun

Recently, nature-inspired computing approaches have gained significant attention for solving difficult optimization problems, particularly through Ising machines for NP-complete applications. Existing Ising accelerators range from quantum…

Hardware Architecture · Computer Science 2026-05-26 Siddhartha Raman Sundara Raman , Lizy K. John , Jaydeep P. Kulkarni

The growing volume of data in modern applications has led to significant computational costs in conventional processor-centric systems. Processing-in-memory (PIM) architectures alleviate these costs by moving computation closer to memory,…

Hardware Architecture · Computer Science 2025-04-23 Geraldo F. Oliveira , Alain Kohli , David Novo , Ataberk Olgun , A. Giray Yaglikci , Saugata Ghose , Juan Gómez-Luna , Onur Mutlu

Transformers have become the backbone of neural network architecture for most machine learning applications. Their widespread use has resulted in multiple efforts on accelerating attention, the basic building block of transformers. This…

Hardware Architecture · Computer Science 2025-02-19 Dong Eun Kim , Tanvi Sharma , Kaushik Roy

High Bandwidth Memory with Processing-in-Memory (HBM-PIM) offers an opportunity to reduce data movement by executing computation directly inside memory, but current commercial platforms expose limited instruction sets and require…

Hardware Architecture · Computer Science 2026-05-01 Emanuele Venieri , Simone Manoni , Alberto Florian , Jaehyun Park , Kyomin Sohn , Andrea Bartolini

Maximal Clique Enumeration (MCE) is a fundamental graph mining problem, and is useful as a primitive in identifying dense structures in a graph. Due to the high computational cost of MCE, parallel methods are imperative for dealing with…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-01-31 Apurba Das , Seyed-Vahid Sanei-Mehri , Srikanta Tirthapura

The growing demand for efficient, high-performance processing in machine learning (ML) and image processing has made hardware accelerators, such as GPUs and Data Streaming Accelerators (DSAs), increasingly essential. These accelerators…

Hardware Architecture · Computer Science 2025-04-17 Qunyou Liu , Marina Zapater , David Atienza

This paper presents a programmable in-memory-computing processor, demonstrated in a 65nm CMOS technology. For data-centric workloads, such as deep neural networks, data movement often dominates when implemented with today's computing…

Hardware Architecture · Computer Science 2020-09-17 Hongyang Jia , Yinqi Tang , Hossein Valavi , Jintao Zhang , Naveen Verma

In view of the tremendous computing power jump of modern RISC processors the interest in parallel computing seems to be thinning out. Why use a complicated system of parallel processors, if the problem can be solved by a single powerful…

comp-gas · Physics 2008-02-03 G. Odor , F. Rohrbach , G. Vesztergombi , G. Varga , F. Tatrai

Due to amount of data involved in emerging deep learning and big data applications, operations related to data movement have quickly become the bottleneck. Data-centric computing (DCC), as enabled by processing-in-memory (PIM) and…

Hardware Architecture · Computer Science 2020-09-22 Kamil Khan , Sudeep Pasricha , Ryan Gary Kim

Processing in Memory (PIM) and similar terms such as Compute In Memory (CIM), Logic in Memory (LIM), In Memory Computing (IMC), and Near Memory Computing (NMC) have gained attention recently as a potentially ``revolutionary new'' technique.…

Hardware Architecture · Computer Science 2026-01-15 Peter M. Kogge

Recursive query processing has experienced a recent resurgence, as a result of its use in many modern application domains, including data integration, graph analytics, security, program analysis, networking and decision making. Due to the…

Databases · Computer Science 2018-12-11 Zhiwei Fan , Jianqiao Zhu , Zuyu Zhang , Aws Albarghouthi , Paraschos Koutris , Jignesh Patel

Numerous applications such as graph processing, cryptography, databases, bioinformatics, etc., involve the repeated evaluation of Boolean functions on large bit vectors. In-memory architectures which perform processing in memory (PIM) are…

Hardware Architecture · Computer Science 2021-12-02 Gian Singh , Ankit Wagle , Sarma Vrudhula , Sunil Khatri

Processing-in-memory (PIM) is a transformative architectural paradigm designed to overcome the Von Neumann bottleneck. Among PIM architectures, digital SRAM-PIM emerges as a promising solution, offering significant advantages by directly…

Hardware Architecture · Computer Science 2025-06-13 Cenlin Duan , Jianlei Yang , Yikun Wang , Yiou Wang , Yingjie Qi , Xiaolin He , Bonan Yan , Xueyan Wang , Xiaotao Jia , Weisheng Zhao

The sparse representation of graphs has shown great potential for accelerating the computation of graph applications (e.g., Social Networks, Knowledge Graphs) on traditional computing architectures (CPU, GPU, or TPU). But the exploration of…

Machine Learning · Computer Science 2024-10-28 Bo Lyu , Shengbo Wang , Shiping Wen , Kaibo Shi , Yin Yang , Lingfang Zeng , Tingwen Huang

Applications with low data reuse and frequent irregular memory accesses, such as graph or sparse linear algebra workloads, fail to scale well due to memory bottlenecks and poor core utilization. While prior work with prefetching,…

Hardware Architecture · Computer Science 2023-05-05 Marcelo Orenes-Vera , Esin Tureci , David Wentzlaff , Margaret Martonosi

Nowadays, various memory-hungry applications like machine learning algorithms are knocking "the memory wall". Toward this, emerging memories featuring computational capacity are foreseen as a promising solution that performs data process…

Hardware Architecture · Computer Science 2023-03-28 Jia-Hui Su , Chen-Hua Lu , Jenq Kuen Lee , Andrea Coluccio , Fabrizio Riente , Marco Vacca , Marco Ottavi , Kuan-Hsun Chen