Related papers: Spatially resolved dielectric loss at the Si/SiO$_…
Lateral inhomogeneities in the formation of 2-dimensional electron gases (2DEG) directly influence their electronic properties. Understanding their origin is an important factor for fundamental interpretations, as well as high quality…
High-dielectric constant and wide band gap oxides have important technological applications. The crystalline oxide polymorphs having lattice constant compatibility to silicon are particularly desirable. One recently reported candidate is…
We investigate the effect of SiC stacking on the 4H-SiC/SiO$_2$ interface, both in the presence and absence of O defects, which appear during thermal oxidation, via first principles calculations. It is known that 4H-SiC(0001) has two…
The electronic properties of two-dimensional (2D) materials depend sensitively on the underlying atomic arrangement down to the monolayer level. Here we present a novel strategy for the determination of the band gap and complex dielectric…
Interfaces govern the unique mechanical response of amorphous multilayers. Here, we examine nanoindentation hardness and deformation behaviour of amorphous-amorphous Ta$_2$O$_5$/SiO$_2$ nanolaminates with bilayer thicknesses ranging from 2…
Materials with good carrier mobilities are desired for device applications, but in real devices the mobilities are usually limited by the presence of interfaces and contacts. Mobility degradation at semiconductor-dielectric interfaces is…
The structural and electronic properties of the LaAlO3/Si(001) interface are determined using state-of-the-art electronic structure calculations. The atomic structure differs from previous proposals, but is reminiscent of La adsorption…
There is a substantial interest in the heterostructures of semiconducting transition metal dichalcogenides (TMDCs) amongst each other or with arbitrary materials, through which the control of the chemical, structural, electronic,…
Due to presence of magnetic field gradient needed for coherent spin control, dephasing of single-electron spin qubits in silicon quantum dots is often dominated by $1/f$ charge noise. We investigate theoretically fluctuations of ground…
The interface between LaAlO3 and SrTiO3 hosts a two-dimensional electron system of itinerant carriers, although both oxides are band insulators. Interface ferromagnetism coexisting with superconductivity has been found and attributed to…
Transmission electron microscopy, scanning transmission electron tomography, and electron energy loss spectroscopy were used to characterize three-dimensional artificial Si nanostructures called "metalattices", focusing on Si metalattices…
Channel conductance measurements can be used as a tool to study thermally activated electron transport in the sub-threshold region of state-of-art FinFETs. Together with theoretical Tight-Binding (TB) calculations, this technique can be…
Microwave irradiation causes voltage fluctuations in solid state nanodevices. Such an effect is relevant in atomic electronics and nanostructures for quantum information processing, where charge or spin states are controlled by microwave…
Donor states in Si nanodevices can be strongly modified by nearby insulating barriers and metallic gates. We report here experimental results indicating a strong reduction in the charging energy of isolated As dopants in Si FinFETs relative…
The dielectric breakdown at metal-oxide interfaces is a critical electronic device failure mechanism. Electronic tunneling through dielectric layers is a well-accepted explanation for this phenomenon. Theoretical band alignment studies,…
Understanding charge transfer at oxide interfaces is crucial for designing materials with emergent electronic and magnetic properties, especially in systems where strong electron correlations and spin-orbit coupling coexist.…
Energy level alignment at solid-solvent interfaces is an important step in determining the properties of electrochemical systems. The positions of conduction and valence band edges of a semiconductor are affected by its environment. In this…
Scalability and performance of current flash memories can be improved substantially by replacing the floating poly-Si gate by a layer of Si dots. This multi-dot layer can be fabricated CMOS-compatibly in very thin gate oxide by ion beam…
We demonstrate a gate dielectric engineering approach leveraging an ultrathin, atomic layer deposited (ALD) silicon oxide interfacial layer (SiL) between the amorphous oxide semiconductor (AOS) channel and the high-k gate dielectric. SiL…
In core/shell quantum dots (QDs), the interface between semiconductors of different chemical character largely determines their optoelectronic properties. In III-V/II-VI systems, this boundary involves pronounced chemical and electronic…