Related papers: STRV -- A radiation hard RISC-V microprocessor for…
RISC-V ISA-based processors have recently emerged as both powerful and energy-efficient computing platforms. The release of the MILK-V Pioneer marked a significant milestone as the first desktop-grade RISC-V system. With increasing…
Modern high-performance computing architectures (Multicore, GPU, Manycore) are based on tightly-coupled clusters of processing elements, physically implemented as rectangular tiles. Their size and aspect ratio strongly impact the achievable…
RISC-V processors are becoming ubiquitous in critical applications, but their susceptibility to microarchitectural side-channel attacks is a serious concern. Detection of microarchitectural attacks in RISC-V is an emerging research topic…
Deploying deep neural networks (DNNs) on those resource-constrained edge platforms is hindered by their substantial computation and storage demands. Quantized multi-precision DNNs, denoted as MP-DNNs, offer a promising solution for these…
The Sophon SG2042 is the world's first commodity 64-core RISC-V CPU for high performance workloads and an important question is whether the SG2042 has the potential to encourage the HPC community to embrace RISC-V. In this paper we…
Real-time systems, particularly those used in domains like automated driving, are increasingly adopting neural networks. From this trend arises the need for high-performance hardware exhibiting predictable timing behavior. While…
The pace of RISC-V adoption continues to grow rapidly, yet for the successes enjoyed in areas such as embedded computing, RISC-V is yet to gain ubiquity in High Performance Computing (HPC). The Sophon SG2044 is SOPHGO's next generation…
This paper presents LIRA-V, a lightweight system for performing remote attestation between constrained devices using the RISC-V architecture. We propose using read-only memory and the RISC-V Physical Memory Protection (PMP) primitive to…
RISC-V is an open and royalty free instruction set architecture which has been developed at the University of California, Berkeley. The processors using RISC-V can be designed and released freely. Because of this, various processor cores…
The operation of resistive and phase-change memory (RRAM and PCM) is controlled by highly localized self-heating effects, yet detailed studies of their temperature are rare due to challenges of nanoscale thermometry. Here we show that the…
Voltage margins, or guardbands, are imposed on DVFS systems to account for process, voltage, and temperature variability effects. While necessary to assure correctness, guardbands reduce energy efficiency, a crucial requirement for embedded…
Selective hardening is widely employed to improve the reliability of FPGA based soft processors while limiting the overhead of full redundancy. However, existing approaches primarily rely on architectural criticality or functional fault…
Recently, RISC-V has contributed to the development of IoT devices, requiring architectures that balance energy efficiency, compact area, and integrated security. However, most recent RISC-V cores for IoT prioritize either area footprint or…
The interest in using the radiation detectors based on high resistive chromium-compensated GaAs (GaAs:Cr) in high energy physics and others applied fields has been growing steadily due to its numerous advantages over others classical…
Thermophotovoltaic (TPV) cells are increasingly attractive for applications in industrial waste heat harvesting, aerospace energy management, and compact power generation. Deploying midwave-infrared (MWIR) TPV in practical applications…
The scheduled High Luminosity upgrade of the CERN Large Hadron Collider presents new challenges in terms of radiation hardness. As a consequence, campaigns to qualify the radiation hardness of detector sensors and components are undertaken…
Surface temperature measurements were performed with a Scanning Thermal Microscope mounted with a thermoresistive wire probe of micrometrSurface temperature measurements were performed with a Scanning Thermal Microscope mounted with a…
RISC-V cores have gained a lot of popularity over the last few years. However, being quite a recent and novel technology, there is still a gap in the availability of comprehensive simulation frameworks for RISC-V that cover both the…
Emerging memristor-based array architectures have been effectively employed in non-volatile memories and neuromorphic computing systems due to their density, scalability and capability of storing information. Nonetheless, to demonstrate a…
In this work, we present the design and evaluation of a Processor Tracing System compliant with the RISC-V Efficient Trace specification for Instruction Branch Tracing. We integrate our system into the host domain of a state-of-the-art edge…