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Printed electronics have gained significant traction in recent years, presenting a viable path to integrating computing into everyday items, from disposable products to low-cost healthcare. However, the adoption of computing in these…
Magnetic media remain a key in information storage and processing. The continuous increase of storage densities and the desire for quantum memories and computers pushes the limits of magnetic characterisation techniques. Ultimately, a tool…
With the exponential rise in the use of cloud services, smart devices, and IoT devices, advanced cyber attacks have become increasingly sophisticated and ubiquitous. Furthermore, the rapid evolution of computing architectures and memory…
A whole range of attacks becomes possible when adversaries gain physical access to computing systems that process or contain sensitive data. Examples include side-channel analysis, bus probing, device cloning, or implanting hardware…
For many decades High Energy Physics (HEP) instrumentation has been concentrated on detectors of ionizing radiation -- where the energy of incident particles or photons is sufficient to create mobile charge in gas, liquid, or solid…
Cryogenic soft X-ray imaging spectrometers are currently being developed for applications in the fields of Astronomy and material sciences. In this paper we present experiments on optimized single devices, which show measured energy…
A light-beam-assisted temperature-control system operating within a temperature range from 77 to 180 K is developed for investigating the absorption of electromagnetic waves by high-temperature superconductors in the vicinity of…
With the expansion of data-intensive applications and increasing data volumes, providing an efficient solution to address growing energy consumption and performance degradation caused by the transfer of large amounts of data between the…
Compressive Raman is a recent framework that allows for large data compression of microspectroscopy during its measurement. Because of its inherent multiplexing architecture, it has shown imaging speeds considerably higher than conventional…
The Through Silicon Via (TSV) process developed by Silex provides down to 30 micrometers pitch for through wafer connections in up to 600 micrometers thick substrates. Integrated with MEMS designs it enables significantly reduced die size…
A new format for storing sparse matrices is proposed for efficient sparse matrix-vector (SpMV) product calculation on modern graphics processing units (GPUs). This format extends the standard compressed row storage (CRS) format and can be…
As part of the Vitamin-V European project, we have built a prototype of a RISC-V cluster managed by OpenStack, with the goal of realizing a functional RISC-V cloud ecosystem. In this poster we explain the hardware and software challenges…
This study explores the synergy between rate-splitting multiple access (RSMA) and simultaneous transmitting and reflecting reconfigurable intelligent surface (STAR-RIS) as a unified framework to enable ubiquitous, intelligent, and resilient…
The RD50-MPW4 is the latest HV-CMOS pixel sensor from the CERN-RD50-CMOS working group, designed to evaluate the HV-CMOS technology in terms of spatial resolution, radiation hardness and timing performance. Fabricated by LFoundry using a…
The implementation of nuclear magnetic resonance (NMR) at the nanoscale is a major challenge, as conventional systems require relatively large ensembles of spins and limit resolution to mesoscopic scales. New approaches based on quantum…
Application Specific Integrated Circuits (ASICs) are used in space-borne instruments for signal processing and detector readout. The electrical interface of these ASICs to frontend printed circuit boards (PCBs) is commonly accomplished with…
While most instruction set architectures (ISAs) are only available to use through the purchase of a restrictive commercial license, the RISC-V ISA presents a free and open-source alternative. Due to this availability, many free and…
As RISC-V architectures proliferate across embedded and high-performance domains, developers face persistent challenges in performance optimization due to fragmented tooling, immature hardware features, and platform-specific defects. This…
The deployment of Machine Learning (ML) applications at the edge on resource-constrained devices has accentuated the need for efficient ML processing on low-cost processors. While traditional CPUs provide programming flexibility, their…
The ever-growing scale of data parallelism in today's HPC and ML applications presents a big challenge for computing architectures' energy efficiency and performance. Vector processors address the scale-up challenge by decoupling Vector…