Related papers: Development of a timing chip prototype in 110 nm C…
The CMS inner pixel detector system is planned to be replaced during the first phase of the LHC luminosity upgrade. The plans foresee an ultra low mass system with four barrel layers and three disks on either end. With the expected increase…
Results obtained with 3D columnar pixel sensors bump-bonded to the RD53A prototype readout chip are reported. The interconnected modules have been tested in a hadron beam before and after irradiation to a fluence of about…
Test beam measurements have been carried out with a 3D sensor on a Timepix3 ASIC and the time measurements are presented. The measurements are compared to those of a thin planar sensor on Timepix3. It is shown that for a perpendicularly…
We have developed two radiation-hard ASICs for optical data transmission in the ATLAS pixel detector at the LHC at CERN: a driver chip for a Vertical Cavity Surface Emitting Laser (VCSEL) diode for 80 Mbit/s data transmission from the…
Detectors based on pixels with timing capabilities are gaining increasing importance in the last years. Next-to-come high-energy physics experiments at colliders require the use of time information in tracking, due to the expected levels of…
The apparatus of the ALICE experiment at CERN will be upgraded in 2017/18 during the second long shutdown of the LHC (LS2). A major motivation for this upgrade is to extend the physics reach for charmed and beauty particles down to low…
The readout chip for the CMS pixel detector has to deal with an enormous data rate. On-chip zero suppression is inevitable and hit data must be buffered locally during the latency of the first level trigger. Dead-time must be kept at a…
This work presents the first measurements performed on the Timespot1 ASIC. As the second prototype developed for the TimeSPOT project, the ASIC features a 32x32 channels hybrid-pixel matrix. Targeted to space-time tracking applications in…
The CALICE collaboration is developing an engineering prototype of an analog hadron calorimeter for a future linear collider detector. The prototype has to prove the feasibility of building a realistic detector with fully integrated…
An upgrade of the ATLAS experiment for the High Luminosity phase of LHC is planned for 2024 and foresees the replacement of the present Inner Detector (ID) with a new Inner Tracker (ITk) completely made of silicon devices. Depleted active…
High-voltage CMOS (HV-CMOS) pixel technology is being considered for future Higgs factory experiments. The ATLASPix3.1 chip, with a pitch of 50$\mu m$ x 150$\mu m$, fabricated using TSI 180nm HV-CMOS technology, is a full reticle-size…
Hybrid pixel detectors require a reliable and cost-effective interconnect technology adapted to the pitch and die sizes of the respective applications. During the ASIC and sensor R&D phase, and in general for small-scale applications, such…
During the high-luminosity phase of the LHC (HL-LHC), planned to start around 2027, the accelerator is expected to deliver an instantaneous peak luminosity of up to $7.5\times10^{34}$ cm$^{-2}$s$^{-1}$. A total integrated luminosity of…
This study presents a novel field-programmable gate array (FPGA)-based Time-to-Digital Converter (TDC) design suitable for high timing resolution applications, utilizing two new techniques. First, a cross-detection (CD) method is introduced…
The High Luminosity LHC (HL-LHC) phase is designed to increase by an order of magnitude the amount of data to be collected by the LHC experiments. The foreseen gradual increase of the instantaneous luminosity of up to more than twice its…
A readout system based on the Timepix4 ASIC, is being developed for photon science. The TEMPUS detector can be operated in two distinct modes: a photon counting mode, which allows for conventional full-frame readout at rates up to 40 kfps;…
The phase 1 upgrade of the CMS pixel detector has been designed to maintain the tracking performance at instantaneous luminosities of $2 \times 10^{34} \mathrm{~cm}^{-2} \mathrm{~s}^{-1}$. Both barrel and endcap disk systems now feature one…
We have developed two radiation-hard ASICs for optical data transmission in the ATLAS pixel detector at the LHC at CERN: a driver chip for a Vertical Cavity Surface Emitting Laser (VCSEL) diode for 80 Mbit/s data transmission from the…
We present the first results from the HPSoC ASIC designed for readout of Ultra-fast Silicon Detectors. The 4-channel ASIC manufactured in 65 nm CMOS by TSMC has been optimized for 50 um thick AC-LGAD. The evaluation of the analog front end…
We have developed two radiation-hard ASICs for optical data transmission in the ATLAS pixel detector at the LHC at CERN: a driver chip for a Vertical Cavity Surface Emitting Laser (VCSEL) diode for 80 Mbit/s data transmission from the…