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Triangle counting (TC) is a fundamental problem in graph analysis and has found numerous applications, which motivates many TC acceleration solutions in the traditional computing platforms like GPU and FPGA. However, these approaches suffer…

Hardware Architecture · Computer Science 2020-07-22 Xueyan Wang , Jianlei Yang , Yinglin Zhao , Yingjie Qi , Meichen Liu , Xingzhou Cheng , Xiaotao Jia , Xiaoming Chen , Gang Qu , Weisheng Zhao

Processing-in-memory (PIM) is a transformative architectural paradigm designed to overcome the Von Neumann bottleneck. Among PIM architectures, digital SRAM-PIM emerges as a promising solution, offering significant advantages by directly…

Hardware Architecture · Computer Science 2025-06-13 Cenlin Duan , Jianlei Yang , Yikun Wang , Yiou Wang , Yingjie Qi , Xiaolin He , Bonan Yan , Xueyan Wang , Xiaotao Jia , Weisheng Zhao

The growing demand for low-power and area-efficient TinyML inference on AIoT devices necessitates memory architectures that minimise data movement while sustaining high computational efficiency. This paper presents FERMI-ML, a Flexible and…

Hardware Architecture · Computer Science 2026-02-12 Mukul Lokhande , Akash Sankhe , S. V. Jaya Chand , Santosh Kumar Vishvakarma

Compute-in-memory (CIM) architecture has been widely explored to address the von Neumann bottleneck in accelerating deep neural networks (DNNs). However, its reliability remains largely understudied, particularly in the emerging domain of…

Hardware Architecture · Computer Science 2025-07-22 Qiufeng Li , Yiwen Liang , Weidong Cao

Large language models (LLMs) have recently transformed natural language processing, enabling machines to generate human-like text and engage in meaningful conversations. This development necessitates speed, efficiency, and accessibility in…

Hardware Architecture · Computer Science 2024-06-13 Christopher Wolters , Xiaoxuan Yang , Ulf Schlichtmann , Toyotaro Suzumura

The accuracy of neural networks has greatly improved across various domains over the past years. Their ever-increasing complexity, however, leads to prohibitively high energy demands and latency in von Neumann systems. Several…

Hardware Architecture · Computer Science 2024-01-24 João Paulo C. de Lima , Asif Ali Khan , Luigi Carro , Jeronimo Castrillon

Non-Intrusive Load Monitoring (NILM) enables the disaggregation of the global power consumption of multiple loads, taken from a single smart electrical meter, into appliance-level details. State-of-the-Art approaches are based on Machine…

Machine Learning · Computer Science 2021-05-24 Enrico Tabanelli , Davide Brunelli , Andrea Acquaviva , Luca Benini

Computing-in-memory (CIM) architectures demonstrate superior performance over traditional architectures. To unleash the potential of CIM accelerators, many compilation methods have been proposed, focusing on application scheduling…

Hardware Architecture · Computer Science 2025-02-25 Shixin Zhao , Yuming Li , Bing Li , Yintao He , Mengdi Wang , Yinhe Han , Ying Wang

AI chips commonly employ SRAM memory as buffers for their reliability and speed, which contribute to high performance. However, SRAM is expensive and demands significant area and energy consumption. Previous studies have explored replacing…

Hardware Architecture · Computer Science 2023-12-07 Duy-Thanh Nguyen , Abhiroop Bhattacharjee , Abhishek Moitra , Priyadarshini Panda

Combinatorial optimization (CO) underpins applications in science and engineering, ranging from logistics to electronic design automation. A classic example is the NP-complete Traveling Salesman Problem (TSP). Finding exact solutions for…

Transformers have become the backbone of neural network architecture for most machine learning applications. Their widespread use has resulted in multiple efforts on accelerating attention, the basic building block of transformers. This…

Hardware Architecture · Computer Science 2025-02-19 Dong Eun Kim , Tanvi Sharma , Kaushik Roy

RRAM-based multi-core systems improve the energy efficiency and performance of CNNs. Thereby, the distributed parallel execution of convolutional layers causes critical data dependencies that limit the potential speedup. This paper presents…

Hardware Architecture · Computer Science 2023-10-27 Rebecca Pelke , Nils Bosbach , Jose Cubero , Felix Staudigl , Rainer Leupers , Jan Moritz Joseph

The Von Neumann bottleneck, which relates to the energy cost of moving data from memory to on-chip core and vice versa, is a serious challenge in state-of-the-art AI architectures, like Convolutional Neural Networks' (CNNs) accelerators.…

Hardware Architecture · Computer Science 2025-02-27 Cristian Sestito , Ahmed J. Abdelmaksoud , Shady Agwa , Themis Prodromakis

Deep Neural Networks (DNNs) have transformed the field of machine learning and are widely deployed in many applications involving image, video, speech and natural language processing. The increasing compute demands of DNNs have been widely…

Machine Learning · Computer Science 2021-08-17 Sourjya Roy , Mustafa Ali , Anand Raghunathan

Crossbar arrays of resistive memories (RRAM) hold the promise of enabling In-Memory Computing (IMC), but essential challenges due to the impact of device imperfection and device endurance have yet to be overcome. In this work, we…

Emerging Technologies · Computer Science 2022-03-04 E. Esmanhotto , T. Hirtzlin , N. Castellani , S. Martin , B. Giraud , F. Andrieu , J. F. Nodin , D. Querlioz , J-M. Portal , E. Vianello

While deep neural network (DNN)-based video denoising has demonstrated significant performance, deploying state-of-the-art models on edge devices remains challenging due to stringent real-time and energy efficiency requirements.…

Computer Vision and Pattern Recognition · Computer Science 2025-05-29 Shan Gao , Zhiqiang Wu , Yawen Niu , Xiaotao Li , Qingqing Xu

We propose overcoming the memory capacity limitation of GPUs with high-capacity Storage-Class Memory (SCM) and DRAM cache. By significantly increasing the memory capacity with SCM, the GPU can capture a larger fraction of the memory…

Hardware Architecture · Computer Science 2024-03-15 Jeongmin Hong , Sungjun Cho , Geonwoo Park , Wonhyuk Yang , Young-Ho Gong , Gwangsun Kim

The primary operation in DNNs is the dot product of quantized input activations and weights. Prior works have proposed the design of memory-centric architectures based on the Processing-In-Memory (PIM) paradigm. Resistive RAM (ReRAM)…

Hardware Architecture · Computer Science 2023-06-29 Mohammad Sabri , Marc Riera , Antonio González

Large Language Models (LLMs) such as LLaMA and DeepSeek, are built on transformer architectures, which have become a standard model for achieving state-of-the-art performance in natural language processing tasks. Recently, there has been…

Hardware Architecture · Computer Science 2026-04-21 Bas Ahn , Xingjian Tao , Manil Dev Gomony , Marc Geilen , Henk Corporaal

Processing in memory (PIM) moves computation into memories with the goal of improving throughput and energy-efficiency compared to traditional von Neumann-based architectures. Most existing PIM architectures are either general-purpose but…

Hardware Architecture · Computer Science 2019-07-23 Oscar Castañeda , Maria Bobbett , Alexandra Gallyas-Sanhueza , Christoph Studer