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Compute-in-memory (CiM) architectures promise significant improvements in energy efficiency and throughput for deep neural network acceleration by alleviating the von Neumann bottleneck. However, their reliance on emerging non-volatile…

Machine Learning · Computer Science 2026-03-05 Yifan Qin , Jiahao Zheng , Zheyu Yan , Wujie Wen , Xiaobo Sharon Hu , Yiyu Shi

In-memory computing (IMC) is an effectual solution for energy-efficient artificial intelligence applications. Analog IMC amortizes the power consumption of multiple sensing amplifiers with analog-to-digital converter (ADC), and…

Emerging Technologies · Computer Science 2021-10-11 Hao Cai , Yanan Guo , Bo Liu , Mingyang Zhou , Juntong Chen , Xinning Liu , Jun Yang

Herein, a bit-wise Convolutional Neural Network (CNN) in-memory accelerator is implemented using Spin-Orbit Torque Magnetic Random Access Memory (SOT-MRAM) computational sub-arrays. It utilizes a novel AND-Accumulation method capable of…

Machine Learning · Computer Science 2019-04-18 Arman Roohi , Shaahin Angizi , Deliang Fan , Ronald F DeMara

Computing-in-Memory (CiM) architectures aim to reduce costly data transfers by performing arithmetic and logic operations in memory and hence relieve the pressure due to the memory wall. However, determining whether a given workload can…

Hardware Architecture · Computer Science 2020-01-16 Di Gao , Dayane Reis , Xiaobo Sharon Hu , Cheng Zhuo

Combinatorial optimization problems are funda- mental for various fields ranging from finance to wireless net- works. This work presents a simulated bifurcation (SB) Ising solver in CMOS for NP-hard optimization problems. Analog domain…

Systems and Control · Electrical Eng. & Systems 2025-04-15 Alana Marie Dee , Sajjad Moazeni

The need to repeatedly shuttle around synaptic weight values from memory to processing units has been a key source of energy inefficiency associated with hardware implementation of artificial neural networks. Analog in-memory computing…

Using Resistive Random Access Memory (RRAM) crossbars in Computing-in-Memory (CIM) architectures offers a promising solution to overcome the von Neumann bottleneck. Due to non-idealities like cell variability, RRAM crossbars are often…

Computation in-memory is a promising non-von Neumann approach aiming at completely diminishing the data transfer to and from the memory subsystem. Although a lot of architectures have been proposed, compiler support for such architectures…

Hardware Architecture · Computer Science 2020-07-02 Kanishkan Vadivel , Lorenzo Chelini , Ali BanaGozar , Gagandeep Singh , Stefano Corda , Roel Jordans , Henk Corporaal

In this paper, we propose a novel memory-centric scheme based on CMOS SRAM for acceleration of data intensive applications. Our proposal aims at dynamically increasing the on-chip memory storage capacity of SRAM arrays on-demand. The…

Hardware Architecture · Computer Science 2021-09-08 Haripriya Sheshadri , Shwetha Vijayakumar , Ajey Jacob , Akhilesh Jaiswal

To support emerging applications ranging from holographic communications to extended reality, next-generation mobile wireless communication systems require ultra-fast and energy-efficient (UFEE) baseband processors. Traditional…

Signal Processing · Electrical Eng. & Systems 2022-05-10 Qunsong Zeng , Jiawei Liu , Jun Lan , Yi Gong , Zhongrui Wang , Yida Li , Kaibin Huang

As the demand for efficient, low-power computing in embedded and edge devices grows, traditional computing methods are becoming less effective for handling complex tasks. Stochastic computing (SC) offers a promising alternative by…

The demand for efficient machine learning (ML) accelerators is growing rapidly, driving the development of novel computing concepts such as resistive random access memory (RRAM)-based tiled computing-in-memory (CIM) architectures. CIM…

Hardware Architecture · Computer Science 2024-01-18 Rebecca Pelke , Jose Cubero-Cascante , Nils Bosbach , Felix Staudigl , Rainer Leupers , Jan Moritz Joseph

Resistive random-access memory (RRAM) provides an excellent platform for analog matrix computing (AMC), enabling both matrix-vector multiplication (MVM) and the solution of matrix equations through open-loop and closed-loop circuit…

Signal Processing · Electrical Eng. & Systems 2025-12-05 Pushen Zuo , Zhong Sun

The demand for computation resources and energy efficiency of Convolutional Neural Networks (CNN) applications requires a new paradigm to overcome the "Memory Wall". Analog In-Memory Computing (AIMC) is a promising paradigm since it…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-11-24 Nazareno Bruschi , Giuseppe Tagliavini , Angelo Garofalo , Francesco Conti , Irem Boybat , Luca Benini , Davide Rossi

Approximate computing (AC) leverages the inherent error resilience and is used in many big-data applications from various domains such as multimedia, computer vision, signal processing, and machine learning to improve systems performance…

Emerging Technologies · Computer Science 2022-05-24 Farah Ferdaus , B. M. S. Bahar Talukder , Md Tauhidur Rahman

Processing-in-memory (PIM) has emerged as a promising solution for accelerating memory-intensive workloads as they provide high memory bandwidth to the processing units. This approach has drawn attention not only from the academic community…

Hardware Architecture · Computer Science 2024-09-11 Dongjae Lee , Bongjoon Hyun , Taehun Kim , Minsoo Rhu

Neural Radiance Fields (NeRF) offer significant promise for generating photorealistic images and videos. However, existing mainstream neural rendering models often fall short in meeting the demands for immediacy and power efficiency in…

Hardware Architecture · Computer Science 2025-08-05 Fangxin Liu , Haomin Li , Bowen Zhu , Zongwu Wang , Zhuoran Song , Habing Guan , Li Jiang

Resistive Random Access Memory (RRAM) is an emerging device for processing-in-memory (PIM) architecture to accelerate convolutional neural network (CNN). However, due to the highly coupled crossbar structure in the RRAM array, it is…

Hardware Architecture · Computer Science 2020-10-14 Songming Yu , Yongpan Liu , Lu Zhang , Jingyu Wang , Jinshan Yue , Zhuqing Yuan , Xueqing Li , Huazhong Yang

High-performance computing systems are moving towards 2.5D and 3D memory hierarchies, based on High Bandwidth Memory (HBM) and Hybrid Memory Cube (HMC) to mitigate the main memory bottlenecks. This trend is also creating new opportunities…

Hardware Architecture · Computer Science 2017-09-26 Erfan Azarkhish , Davide Rossi , Igor Loi , Luca Benini

Resistive In-Memory Computing (RIMC) offers ultra-efficient computation for edge AI but faces accuracy degradation due to RRAM conductance drift over time. Traditional retraining methods are limited by RRAM's high energy consumption, write…

Hardware Architecture · Computer Science 2025-04-08 Weirong Dong , Kai Zhou , Zhen Kong , Quan Cheng , Junkai Huang , Zhengke Yang , Masanori Hashimoto , Longyang Lin