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The performance bottleneck of deep-learning-based recommender systems resides in their backbone Deep Neural Networks. By integrating Processing-In-Memory~(PIM) architectures, researchers can reduce data movement and enhance energy…

Hardware Architecture · Computer Science 2025-05-19 Feng Cheng , Tunhou Zhang , Junyao Zhang , Jonathan Hao-Cheng Ku , Yitu Wang , Xiaoxuan Yang , Hai , Li , Yiran Chen

Current Artificial Intelligence (AI) computation systems face challenges, primarily from the memory-wall issue, limiting overall system-level performance, especially for Edge devices with constrained battery budgets, such as smartphones,…

Hardware Architecture · Computer Science 2024-10-15 Lucas Huijbregts , Liu Hsiao-Hsuan , Paul Detterer , Said Hamdioui , Amirreza Yousefzadeh , Rajendra Bishnoi

Convolutional neural networks (CNNs) play a key role in deep learning applications. However, the large storage overheads and the substantial computation cost of CNNs are problematic in hardware accelerators. Computing-in-memory (CIM)…

Hardware Architecture · Computer Science 2021-05-26 Syuan-Hao Sie , Jye-Luen Lee , Yi-Ren Chen , Chih-Cheng Lu , Chih-Cheng Hsieh , Meng-Fan Chang , Kea-Tiong Tang

Although deep learning-based personalized recommendation systems provide qualified recommendations, they strain data center resources. The main bottleneck is the embedding layer, which is highly memory-intensive due to its sparse, irregular…

Hardware Architecture · Computer Science 2025-11-26 Youngsuk Kim , Junghwan Lim , Hyuk-Jae Lee , Chae Eun Rhee

Herein, a bit-wise Convolutional Neural Network (CNN) in-memory accelerator is implemented using Spin-Orbit Torque Magnetic Random Access Memory (SOT-MRAM) computational sub-arrays. It utilizes a novel AND-Accumulation method capable of…

Machine Learning · Computer Science 2019-04-18 Arman Roohi , Shaahin Angizi , Deliang Fan , Ronald F DeMara

Processing-in-memory (PIM) is a promising computing paradigm to tackle the "memory wall" challenge. However, PIM system-level benefits over traditional von Neumann architecture can be reduced when the memory array cannot fully store all the…

Hardware Architecture · Computer Science 2025-03-03 Peilin Chen , Xiaoxuan Yang

Many modern workloads such as neural network inference and graph processing are fundamentally memory-bound. For such workloads, data movement between memory and CPU cores imposes a significant overhead in terms of both latency and energy. A…

Hardware Architecture · Computer Science 2023-04-04 Juan Gómez-Luna , Izzat El Hajj , Ivan Fernandez , Christina Giannoula , Geraldo F. Oliveira , Onur Mutlu

Traditional computers with von Neumann architecture are unable to meet the latency and scalability challenges of Deep Neural Network (DNN) workloads. Various DNN accelerators based on Conventional compute Hardware Accelerator (CHA),…

Hardware Architecture · Computer Science 2022-08-11 Tom Glint , Chandan Kumar Jha , Manu Awasthi , Joycee Mekie

DNA sequence classification is a fundamental task in computational biology with vast implications for applications such as disease prevention and drug design. Therefore, fast high-quality sequence classifiers are significantly important.…

Machine Learning · Computer Science 2023-11-07 Marcel Khalifa , Barak Hoffer , Orian Leitersdorf , Robert Hanhan , Ben Perach , Leonid Yavits , Shahar Kvatinsky

Recently, crossbar array based in-memory accelerators have been gaining interest due to their high throughput and energy efficiency. While software and compiler support for the in-memory accelerators has also been introduced, they are…

Hardware Architecture · Computer Science 2025-01-14 Jihoon Park , Jeongin Choe , Dohyun Kim , Jae-Joon Kim

Neural Network (NN) accelerators with emerging ReRAM (resistive random access memory) technologies have been investigated as one of the promising solutions to address the \textit{memory wall} challenge, due to the unique capability of…

Emerging Technologies · Computer Science 2019-01-30 Yu Ji , Youyang Zhang , Xinfeng Xie , Shuangchen Li , Peiqi Wang , Xing Hu , Youhui Zhang , Yuan Xie

Computing-in-Memory (CIM) accelerators are a promising solution for accelerating Machine Learning (ML) workloads, as they perform Matrix-Vector Multiplications (MVMs) on crossbar arrays directly in memory. Although the bit widths of the…

Machine Learning · Computer Science 2026-03-20 Rebecca Pelke , Joel Klein , Jose Cubero-Cascante , Nils Bosbach , Jan Moritz Joseph , Rainer Leupers

Emerging non-volatile memory (NVM)-based Computing-in-Memory (CiM) architectures show substantial promise in accelerating deep neural networks (DNNs) due to their exceptional energy efficiency. However, NVM devices are prone to device…

Machine Learning · Computer Science 2023-12-12 Zheyu Yan , Xiaobo Sharon Hu , Yiyu Shi

Passive resistive random access memory (ReRAM) crossbar arrays, a promising emerging technology used for analog matrix-vector multiplications, are far superior to their active (1T1R) counterparts in terms of the integration density.…

Resistive Random-Access-Memory (ReRAM) crossbar is a promising technique for deep neural network (DNN) accelerators, thanks to its in-memory and in-situ analog computing abilities for Vector-Matrix Multiplication-and-Accumulations (VMMs).…

Hardware Architecture · Computer Science 2021-03-03 Fangxin Liu , Wenbo Zhao , Yilong Zhao , Zongwu Wang , Tao Yang , Zhezhi He , Naifeng Jing , Xiaoyao Liang , Li Jiang

As its core computation, a self-attention mechanism gauges pairwise correlations across the entire input sequence. Despite favorable performance, calculating pairwise correlations is prohibitively costly. While recent work has shown the…

Machine Learning · Computer Science 2022-09-02 Amir Yazdanbakhsh , Ashkan Moradifirouzabadi , Zheng Li , Mingu Kang

Recent advances in Scientific Machine Learning have shown that second-order methods can enhance the training of Physics-Informed Neural Networks (PINNs), making them a suitable alternative to traditional numerical methods for Partial…

Machine Learning · Computer Science 2025-10-27 Andrea Bonfanti , Ismael Medina , Roman List , Björn Staeves , Roberto Santana , Marco Ellero

The rapid advancement of Large Language Models (LLMs) has revolutionized various aspects of human life, yet their immense computational and energy demands pose significant challenges for efficient inference. The memory wall, the growing…

Hardware Architecture · Computer Science 2025-09-18 Hongyi Li , Songchen Ma , Huanyu Qu , Weihao Zhang , Jia Chen , Junfeng Lin , Fengbin Tu , Rong Zhao

Processing in memory (PIM) moves computation into memories with the goal of improving throughput and energy-efficiency compared to traditional von Neumann-based architectures. Most existing PIM architectures are either general-purpose but…

Hardware Architecture · Computer Science 2019-07-23 Oscar Castañeda , Maria Bobbett , Alexandra Gallyas-Sanhueza , Christoph Studer

We propose both serial and parallel proximal (linearized) alternating direction method of multipliers (ADMM) algorithms for training residual neural networks. In contrast to backpropagation-based approaches, our methods inherently mitigate…

Machine Learning · Computer Science 2025-04-01 Jintao Xu , Yifei Li , Wenxun Xing
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