Related papers: Low-Latency Analog-to-Analog Signal Processing usi…

The auto-regressive decoding of Large Language Models (LLMs) results in significant overheads in their hardware performance. While recent research has investigated various speculative decoding techniques for multi-token generation, these…

Ultra-reliable and low-latency communication (URLLC) is one of the three major service classes supported by the fifth generation (5G) New Radio (NR) technical specifications. In this paper, we introduce a physical layer architecture that…

With the emergence of low-cost robotic systems, such as unmanned aerial vehicle, the importance of embedded high-performance image processing has increased. For a long time, FPGAs were the only processing hardware that were capable of…

With the advent of high-speed, high-precision, and low-power mixed-signal systems, there is an ever-growing demand for accurate, fast, and energy-efficient analog-to-digital (ADCs) and digital-to-analog converters (DACs). Unfortunately,…

Analog-to-digital converters (ADCs) play a vital important role in any devices via manipulating analog signals in a digital manner. Given that the amplitude of the signal exceeds the dynamic range of the ADCs, clipping occurs and the…

Packet parsing is a key step in SDN-aware devices. Packet parsers in SDN networks need to be both reconfigurable and fast, to support the evolving network protocols and the increasing multi-gigabit data rates. The combination of packet…

Recent work has shown the promise of applying deep learning to enhance software processing of radio frequency (RF) signals. In parallel, hardware developments with quantum RF sensors based on Rydberg atoms are breaking longstanding barriers…

We present the first demonstration of a local oscillator (LO)-less digital signal processing (DSP)-free coherent receiver for high-capacity short distance optical links. Experimental results with an analog domain constant modulous algorithm…

With the advent of the 5G wireless networks, achieving tens of gigabits per second throughputs and low, milliseconds, latency has become a reality. This level of performance will fuel numerous real-time applications, such as autonomy and…

This work reports the performance evaluation of an SDR readout system based on the latest generation (Gen3) of the AMD's Radio Frequency System-on-Chip (RFSoC) processing platform, which integrates a full-stack processing system and a…

This paper summarizes the idea of Adaptive-Latency DRAM (AL-DRAM), which was published in HPCA 2015, and examines the work's significance and future potential. AL-DRAM is a mechanism that optimizes DRAM latency based on the DRAM module and…

A cross-layer cognitive radio system is designed to support unicast and multicast traffic with integration of dynamic spectrum access (DSA), backpressure algorithm, and network coding for multi-hop networking. The full protocol stack that…

Spiking neural networks (SNNs) have gained attention in recent years due to their ability to handle sparse and event-based data better than regular artificial neural networks (ANNs). Since the structure of SNNs is less suited for typically…

A 33.6 ps LSB Time-to-Digital converter was designed in 130 nm BiCMOS technology. The core of the converter is a differential 9-stage ring oscillator, based on a multi-path architecture. A novel version of this design is proposed, along…

This paper presents a novel approach to neuromorphic audio processing by integrating the strengths of Spiking Neural Networks (SNNs), Transformers, and high-performance computing (HPC) into the HPCNeuroNet architecture. Utilizing the Intel…

Low cost and low power consumption processor play a vital role in the field of Digital Signal Processing (DSP). The OMAP-L138 development kit which is low cost, low power consumption, ease and speed, with a wide variety of applications…

Reservoir computing is a new, powerful and flexible machine learning technique that is easily implemented in hardware. Recently, by using a time-multiplexed architecture, hardware reservoir computers have reached performance comparable to…

In this paper, a neural network based real-time speech recognition (SR) system is developed using an FPGA for very low-power operation. The implemented system employs two recurrent neural networks (RNNs); one is a speech-to-character RNN…

Always-on AI applications, from environmental sensors to biomedical implants, require ultra-low power consumption. Analog circuits offer a path to sub-microwatt inference, yet existing analog implementations are limited to feedforward…

Physical reservoir computing (PRC) is a promising brain-inspired computing architecture for overcoming the von Neumann bottleneck by utilizing the intrinsic dynamics of physical systems. However, a major obstacle to its real-world…