Related papers: Development of a new high-speed data acquisition s…

By using the dynamic reconfigurable transceiver in high speed interface design, designer can solve critical technology problems such as ensuring signal integrity conveniently, with lower error binary rate. In this paper, we designed a high…

We developed a beam telescope system comprising five layers of 300-$\mu$m-thick INTPIX4NA monolithic pixel sensors with each pixel size of 17 $\mu$m square. The sensors were fabricated using silicon-on-insulator (SOI) technology. The…

We have been developing the SOI pixel detector ``INTPIX'' for space use and general purpose applications such as the residual stress measurement of a rail and high energy physics experiments. INTPIX is a monolithic pixel detector composed…

We present a smart pixel prototype readout integrated circuit (ROIC) designed in CMOS 28 nm bulk process, with in-pixel implementation of an artificial intelligence (AI) / machine learning (ML) based data filtering algorithm designed as…

A monolithic pixel sensor in deep-submicron Silicon-On-Insulator (SOI) CMOS technology has been designed, manufactured and characterised. This technology is of significant interest for applications in particle tracking and imaging. The…

With the increasing physical event rate and number of electronic channels, traditional readout scheme meets the challenge of improving readout speed caused by the limited bandwidth of crate backplane. In this paper, a high-speed data…

A MHz frame rate X-ray area detector (LPD - Large Pixel Detector) is under development by the Rutherford Appleton Laboratory for the European XFEL. The detector will have 1 million pixels and allows analogue storage of 512 images taken at…

The proposed Circular Electron Positron Collider (CEPC) imposes new challenges for the vertex detector in terms of high resolution, low material, fast readout and low power. The Monolithic Active Pixel Sensor (MAPS) technology has been…

We have been developing monolithic active pixel sensors, named ``XRPIX'', based on the silicon-on-insulator (SOI) pixel technology for future X-ray astronomy satellites. XRPIX has the function of event trigger and hit address outputs. This…

This paper presents an RDMA over Ethernet protocol used for data acquisition systems, currently under development at the ESRF. The protocol is implemented on Xilinx Ultrascale + FPGAs thanks to the 100G hard MAC IP. The proposed protocol is…

We develop a custom Bit Error Rate test bench based on Altera's Stratix II GX transceiver signal integrity development kit, demonstrate it on point-to-point serial optical link with data rate up to 5 Gbps, and compare it with commercial…

We present the first physical realization of in-pixel signal processing with integrated AI-based data filtering for particle tracking detectors. Building on prior work that demonstrated a physics-motivated edge-AI algorithm suitable for…

We present a gigabit transceiver prototype Application Specific Integrated Circuit (ASIC), GBCR, for the ATLAS Inner Tracker (ITk) Pixel detector readout upgrade. GBCR is designed in a 65-nm CMOS technology and consists of four upstream…

SOI (Silicon-On-Insulator) pixel sensor is promising technology for developing the high position resolution detector by integrating the small pixels and circuits in the monolithic way. The event driven (trigger mode) SOI based pixel sensor…

We present the design and the test results of a quad-channel optical transceiver module (QTRx) possibly for future particle physics experiments. The transmitters of QTRx, each at 10 Gbps, are based on a Quad-channel VCSEL Diode array Driver…

Investigation of HV-CMOS sensors for use as a tracking detector in the ATLAS experiment at the upgraded LHC (HL-LHC) has recently been an active field of research. A potential candidate for a pixel detector built in Silicon-On-Insulator…

The PCIe400 is a generic readout board designed for high-throughput data acquisition in future high-energy physics experiments. It interfaces up to 48 bidirectional links supporting custom protocols from 1 to 26 Gbps to modern back-end…

A monolithic silicon pixel ASIC prototype, produced in 2024 as part of the Horizon 2020 MONOLITH ERC Advanced project, was tested with a 120 GeV/c pion beam. The ASIC features a matrix of hexagonal pixels with a 100 \mu m pitch, read by…

We have been developing a monolithic active pixel sensor, ``XRPIX``, for the Japan led future X-ray astronomy mission ``FORCE`` observing the X-ray sky in the energy band of 1-80 keV with angular resolution of better than 15``. XRPIX is an…

A noise-tolerant data communications fabric has been developed to meet the real-time data acquisition and control requirements of fast feedback loops, machine protection systems, pulse-to-pulse sequencing, and machine-experiment…