Related papers: Development of a new high-speed data acquisition s…
The third-generation instrument for the 10-meter South Pole Telescope, SPT-3G, was first installed in January 2017. In addition to completely new cryostats, secondary telescope optics, and readout electronics, the number of detectors in the…
Purpose: To demonstrate a proton imaging system based on well-established fast scintillator technology to achieve high performance with low cost and complexity, with the potential of a straightforward translation into clinical use. Methods:…
A compact radiation-tolerant array optical transmitter module (ATx) is developed to provide data transmission up to 10Gbps per channel with 12 parallel channels for collider detector applications. The ATx integrates a Vertical Cavity…
High Energy Physics (HEP) data acquisition systems are often built from high-end FPGAs. As such systems scale in the HL-LHC era, severe under-utilization of FPGA transceivers can occur because front-end links prioritize radiation hardness…
Single Photon Emission Computed Tomography (SPECT) is a non-invasive imaging modality, frequently used in myocardial perfusion imaging. The biggest challenges facing the majority of clinical SPECT systems are low sensitivity, poor…
We have developed CMOS imaging sensor (XRPIX) using SOI (Silicon-On-Insulator) technology for the X-ray astronomical use. XRPIX(X-Ray soiPIXel) has advantage of a high time resolution, a high position resolution and an observation in a wide…
The Medipix4 chip is the latest member in the Medipix/Timepix family of hybrid pixel detector chips aimed at high-rate spectroscopic X-ray imaging using high-Z materials. It can be tiled on all 4 sides making it ideal for constructing…
The experiments at LHC are implementing novel and challenging detector upgrades for the High Luminosity LHC, among which the tracking systems. This paper reports on performance studies, illustrated by an electron trigger, using a simplified…
X-ray SOI pixel sensors, "XRPIX", are being developed for the next-generation X-ray astronomical satellite, "FORCE". The XRPIX are fabricated with the SOI technology, which makes it possible to integrate a high-resistivity Si sensor and a…
We present a scalable in-pixel processing architecture that can reduce the data throughput by 10X and consume less than 30 mW per megapixel at the imager frontend. Unlike the state-of-the-art (SOA) analog process-in-pixel (PIP) that…
A new generation of radio telescopes is achieving unprecedented levels of sensitivity and resolution, as well as increased agility and field-of-view, by employing high-performance digital signal processing hardware to phase and correlate…
The TT-PET collaboration is developing a PET scanner for small animals with 30 ps time-of-flight resolution and sub-millimetre 3D detection granularity. The sensitive element of the scanner is a monolithic silicon pixel detector based on…
An Application Specific Integrated Circuit (ASIC), called RIGEL, designed for the sparse readout of a Silicon Pixel Drift Detector (PixDD) for space applications is presented.The low leakage current (less than 1 pA at +20 {\deg}C) and anode…
The energy range from a few hundred keV to a few MeV includes important probes such as nuclear gamma-rays and the 511 keV annihilation line. However, compared to X-rays and GeV/TeV gamma-rays, this range suffers from lower sensitivity by…
We present a prototype for the first tracking detector consisting of 250 micron thin scintillating fibers and silicon photomultiplier (SiPM) arrays. The detector has a modular design, each module consists of a mechanical support structure…
The third generation South Pole Telescope camera (SPT-3G) improves upon its predecessor (SPTpol) by an order of magnitude increase in detectors on the focal plane. The technology used to read out and control these detectors, digital…
The Skipper CCD-in-CMOS Parallel Read-Out Circuit V2 (SPROCKET2) is designed to enable high frame rate readout of Skipper CCD-in-CMOS image sensors. The SPROCKET2 pixel is fabricated in a 65 nm CMOS process and occupies a 60$\mu$m $\times$…
Reconfigurable architectures like Field Programmable Gate Arrays (FPGAs) have been used for accelerating computations in several domains because of their unique combination of flexibility, performance, and power efficiency. However, FPGAs…
A 16-element, compact phased array transceiver is demonstrated at E-band (71-76 and 81-86GHz). A Weaver image selection architecture reduces the LO tuning range to 3GHz while covering the 10GHz band. The bidirectional and efficient…
We present a programmable 16 channel, mixed signal, low power readout ASIC, having the project historically named Gigasample Recorder of Analog waveforms from a PHotodetector (GRAPH). It is designed to read large aperture single photon…