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Deep Neural Networks (DNNs) are being heavily utilized in modern applications and are putting energy-constraint devices to the test. To bypass high energy consumption issues, approximate computing has been employed in DNN accelerators to…

Machine Learning · Computer Science 2022-07-26 Ourania Spantidi , Georgios Zervakis , Iraklis Anagnostopoulos , Jörg Henkel

Existing FPGA-based DNN accelerators typically fall into two design paradigms. Either they adopt a generic reusable architecture to support different DNN networks but leave some performance and efficiency on the table because of the…

Hardware Architecture · Computer Science 2021-03-25 Xiaofan Zhang , Hanchen Ye , Junsong Wang , Yonghua Lin , Jinjun Xiong , Wen-mei Hwu , Deming Chen

Deep convolution Neural Network (DCNN) has been widely used in computer vision tasks. However, for edge devices even inference has too large computational complexity and data access amount. The inference latency of state-of-the-art models…

Hardware Architecture · Computer Science 2025-09-09 Kuan-Ting Lin , Ching-Te Chiu , Jheng-Yi Chang , Shi-Zong Huang , Yu-Ting Li

Machine intelligence, especially using convolutional neural networks (CNNs), has become a large area of research over the past years. Increasingly sophisticated hardware accelerators are proposed that exploit e.g. the sparsity in…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-06-23 Andreas Bytyn , René Ahlsdorf , Rainer Leupers , Gerd Ascheid

Convolutional Neural Networks (CNNs) have shown outstanding accuracy for many vision tasks during recent years. When deploying CNNs on portable devices and embedded systems, however, the large number of parameters and computations result in…

Signal Processing · Electrical Eng. & Systems 2020-02-19 Mehdi Ahmadi , Shervin Vakili , J. M. Pierre Langlois

As the landscape of deep neural networks evolves, heterogeneous dataflow accelerators, in the form of multi-core architectures or chiplet-based designs, promise more flexibility and higher inference performance through scalability. So far,…

Hardware Architecture · Computer Science 2025-10-08 Arne Symons , Linyan Mei , Steven Colleman , Pouya Houshmand , Sebastian Karl , Marian Verhelst

We show that DNN accelerator micro-architectures and their program mappings represent specific choices of loop order and hardware parallelism for computing the seven nested loops of DNNs, which enables us to create a formal taxonomy of all…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-04-28 Xuan Yang , Mingyu Gao , Qiaoyi Liu , Jeff Ou Setter , Jing Pu , Ankita Nayak , Steven Emberton Bell , Kaidi Cao , Heonjae Ha , Priyanka Raina , Christos Kozyrakis , Mark Horowitz

High quality AI solutions require joint optimization of AI algorithms, such as deep neural networks (DNNs), and their hardware accelerators. To improve the overall solution quality as well as to boost the design productivity, efficient…

Hardware Architecture · Computer Science 2020-10-16 Cong Hao , Yao Chen , Xiaofan Zhang , Yuhong Li , Jinjun Xiong , Wen-mei Hwu , Deming Chen

Many convolutional neural network (CNN) accelerators face performance- and energy-efficiency challenges which are crucial for embedded implementations, due to high DRAM access latency and energy. Recently, some DRAM architectures have been…

Hardware Architecture · Computer Science 2023-03-06 Rachmad Vidya Wicaksana Putra , Muhammad Abdullah Hanif , Muhammad Shafique

In Federated Learning (FL), devices that participate in the training usually have heterogeneous resources, i.e., energy availability. In current deployments of FL, devices that do not fulfill certain hardware requirements are often dropped…

Hardware Architecture · Computer Science 2024-12-03 Kilian Pfeiffer , Konstantinos Balaskas , Kostas Siozios , Jörg Henkel

Optimizing resource utilization in target platforms is key to achieving high performance during DNN inference. While optimizations have been proposed for inference latency, memory footprint, and energy consumption, prior hardware-aware…

Machine Learning · Computer Science 2022-03-24 Ahmet Caner Yüzügüler , Nikolaos Dimitriadis , Pascal Frossard

Graph Neural Networks (GNNs) use a fully-connected layer to extract features from the nodes of a graph and aggregate these features using message passing between nodes, combining two distinct computational patterns: dense, regular…

Hardware Architecture · Computer Science 2021-03-22 Jacob R. Stevens , Dipankar Das , Sasikanth Avancha , Bharat Kaul , Anand Raghunathan

Heterogeneous multi-core architectures combine a few "host" cores, optimized for single-thread performance, with many small energy-efficient "accelerator" cores for data-parallel processing, on a single chip. Offloading a computation to the…

Hardware Architecture · Computer Science 2025-11-11 Luca Colagrande , Luca Benini

The exponential emergence of Field Programmable Gate Array (FPGA) has accelerated the research of hardware implementation of Deep Neural Network (DNN). Among all DNN processors, domain specific architectures, such as, Google's Tensor…

Hardware Architecture · Computer Science 2022-02-15 Rourab Paul , Sreetama Sarkar , Suman Sau , Koushik Chakraborty , Sanghamitra Roy , Amlan Chakrabarti

Deep Neural Networks (DNNs) are very popular because of their high performance in various cognitive tasks in Machine Learning (ML). Recent advancements in DNNs have brought beyond human accuracy in many tasks, but at the cost of high…

Hardware Architecture · Computer Science 2022-03-18 Giorgos Armeniakos , Georgios Zervakis , Dimitrios Soudris , Jörg Henkel

Deep neural network (DNN) accelerators with improved energy and delay are desirable for meeting the requirements of hardware targeted for IoT and edge computing systems. Convolutional neural networks (CoNNs) belong to one of the most…

Computer Vision and Pattern Recognition · Computer Science 2019-05-06 Qiuwen Lou , Chenyun Pan , John McGuiness , Andras Horvath , Azad Naeemi , Michael Niemier , X. Sharon Hu

With the rapid development of DNN applications, multi-tenant execution, where multiple DNNs are co-located on a single SoC, is becoming a prevailing trend. Although many methods are proposed in prior works to improve multi-tenant…

Hardware Architecture · Computer Science 2025-05-15 Tianhao Cai , Liang Wang , Limin Xiao , Meng Han , Zeyu Wang , Lin Sun , Xiaojian Liao

The state-of-the-art accelerators for Convolutional Neural Networks (CNNs) typically focus on accelerating only the convolutional layers, but do not prioritize the fully-connected layers much. Hence, they lack a synergistic optimization of…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-11-01 Muhammad Abdullah Hanif , Rachmad Vidya Wicaksana Putra , Muhammad Tanvir , Rehan Hafiz , Semeen Rehman , Muhammad Shafique

Deep neural network (DNN) has driven extensive applications in mobile technology. However, for long-running mobile apps like voice assistants or video applications on smartphones, energy efficiency is critical for battery-powered devices.…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-05-01 Zheng Lin , Bin Guo , Sicong Liu , Wentao Zhou , Yasan Ding , Yu Zhang , Zhiwen Yu

There is a growing necessity for edge training to adapt to dynamically changing environment. Neuromorphic computing represents a significant pathway for high-efficiency intelligent computation in energy-constrained edges, but existing…