High quality AI solutions require joint optimization of AI algorithms, such as deep neural networks (DNNs), and their hardware accelerators. To improve the overall solution quality as well as to boost the design productivity, efficient algorithm and accelerator co-design methodologies are indispensable. In this paper, we first discuss the motivations and challenges for the Algorithm/Accelerator co-design problem and then provide several effective solutions. Especially, we highlight three leading works of effective co-design methodologies: 1) the first simultaneous DNN/FPGA co-design method; 2) a bi-directional lightweight DNN and accelerator co-design method; 3) a differentiable and efficient DNN and accelerator co-search method. We demonstrate the effectiveness of the proposed co-design approaches using extensive experiments on both FPGAs and GPUs, with comparisons to existing works. This paper emphasizes the importance and efficacy of algorithm-accelerator co-design and calls for more research breakthroughs in this interesting and demanding area.
@article{arxiv.2010.07185,
title = {Effective Algorithm-Accelerator Co-design for AI Solutions on Edge Devices},
author = {Cong Hao and Yao Chen and Xiaofan Zhang and Yuhong Li and Jinjun Xiong and Wen-mei Hwu and Deming Chen},
journal= {arXiv preprint arXiv:2010.07185},
year = {2020}
}