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Non-volatile memory (NVM) promises persistent main memory that remains correct despite loss of power. This has sparked a line of research into algorithms that can recover from a system crash. Since caches are expected to remain volatile,…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-06-22 Naama Ben-David , Guy E. Blelloch , Michal Friedman , Yuanhao Wei

Existing key-value (KV) cache compression methods typically rely on heuristics, such as uniform cache allocation across layers or static eviction policies, however, they ignore the critical interplays among layer-specific feature patterns…

Machine Learning · Computer Science 2025-09-11 Bohan Yu , Yekun Chai

Lossy compression is one of the most efficient solutions to reduce storage overhead and improve I/O performance for HPC applications. However, existing parallel I/O libraries cannot fully utilize lossy compression to accelerate parallel…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-06-30 Sian Jin , Dingwen Tao , Houjun Tang , Sheng Di , Suren Byna , Zarija Lukic , Franck Cappello

Approaches for compressing large-language models using low-rank decomposition have made strides, particularly with the introduction of activation and loss-aware SVD, which improves the trade-off between decomposition rank and downstream…

Machine Learning · Computer Science 2025-12-17 Sidhant Sundrani , Francesco Tudisco , Pasquale Minervini

Deployment of modern TinyML tasks on small battery-constrained IoT devices requires high computational energy efficiency. Analog In-Memory Computing (IMC) using non-volatile memory (NVM) promises major efficiency improvements in deep neural…

Hardware Architecture · Computer Science 2022-01-05 Angelo Garofalo , Gianmarco Ottavi , Francesco Conti , Geethan Karunaratne , Irem Boybat , Luca Benini , Davide Rossi

To mitigate the impact of noise and interference on multi-level-cell (MLC) flash memory with the use of low-density parity-check (LDPC) codes, we propose a dynamic write-voltage design scheme considering the asymmetric property of raw bit…

Signal Processing · Electrical Eng. & Systems 2022-09-07 Runbin Cai , Yi Fang , Zhifang Shi , Lin Dai , Guojun Han

Most real-world problems that machine learning algorithms are expected to solve face the situation with 1) unknown data distribution; 2) little domain-specific knowledge; and 3) datasets with limited annotation. We propose Non-Parametric…

Machine Learning · Computer Science 2022-09-20 Zhiying Jiang , Yiqin Dai , Ji Xin , Ming Li , Jimmy Lin

Long-context Large Language Model (LLM) inference faces increasing compute bottlenecks as attention calculations scale with context length, primarily due to the growing KV-cache transfer overhead that saturates High Bandwidth Memory (HBM).…

Hardware Architecture · Computer Science 2025-08-13 Ming-Yen Lee , Faaiq Waqar , Hanchen Yang , Muhammed Ahosan Ul Karim , Harsono Simka , Shimeng Yu

Image bitmaps have been widely used in in-memory applications, which consume lots of storage space and energy. Compared with legacy DRAM, non-volatile memories (NVMs) are suitable for bitmap storage due to the salient features in capacity…

Hardware Architecture · Computer Science 2019-05-08 Zhangyu Chen , Yu Hua , Pengfei Zuo , Yuanyuan Sun , Yuncheng Guo

DRAM-based memory is a critical factor that creates a bottleneck on the system performance since the processor speed largely outperforms the DRAM latency. In this thesis, we develop a low-cost mechanism, called ChargeCache, which enables…

Hardware Architecture · Computer Science 2016-09-26 Hasan Hassan

We demonstrate that unstructured sparsity significantly improves KV cache compression for LLMs, enabling sparsity levels up to 70% without compromising accuracy or requiring fine-tuning. We conduct a systematic exploration of pruning…

Machine Learning · Computer Science 2025-11-07 Donghyeon Joo , Helya Hosseini , Ramyad Hadidi , Bahar Asgari

Large Language Model (LLM) serving is increasingly constrained by the growing size of the key-value (KV) cache, which scales with both context length and generation length. Prior work shows that attention is dominated by a small subset of…

Machine Learning · Computer Science 2026-04-21 Nazmul Takbir , Hamidreza Alikhani , Nikil Dutt , Sangeetha Abdu Jyothi

Key-Value (KV) Caching has become an essential technique for accelerating the inference speed and throughput of generative Large Language Models~(LLMs). However, the memory footprint of the KV cache poses a critical bottleneck in LLM…

Machine Learning · Computer Science 2024-02-29 June Yong Yang , Byeongwook Kim , Jeongin Bae , Beomseok Kwon , Gunho Park , Eunho Yang , Se Jung Kwon , Dongsoo Lee

Non-volatile memory (NVM) is an emerging technology, which has the persistence characteristics of large capacity storage devices(e.g., HDDs and SSDs), while providing the low access latency and byte-addressablity of traditional DRAM memory.…

Databases · Computer Science 2020-05-18 Yinjun Wu , Kwanghyun Park , Rathijit Sen , Brian Kroth , Jaeyoung Do

Memory caches are being aggressively used in today's data-parallel systems such as Spark, Tez, and Piccolo. However, prevalent systems employ rather simple cache management policies--notably the Least Recently Used (LRU) policy--that are…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-03-27 Yinghao Yu , Wei Wang , Jun Zhang , Khaled Ben Letaief

Emerging Non-Volatile Memories (NVMs) are promising contenders for building future memory systems. On the other side, unlike DRAM systems, NVMs can retain data even after power loss and thus enlarge the attack surface. While data encryption…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-10-24 Amro Awad , Laurent Njilla , Mao Ye

Spin-Transfer Torque RAM (STTRAM) is a promising alternative to SRAM in on-chip caches due to several advantages. These advantages include non-volatility, low leakage, high integration density, and CMOS compatibility. Prior studies have…

Hardware Architecture · Computer Science 2020-09-25 Kyle Kuan , Tosiron Adegbija

Large language models (LLM) have achieved remarkable performance across a wide range of tasks. However, their substantial parameter sizes pose significant challenges for deployment on edge devices with limited computational and memory…

Computation and Language · Computer Science 2025-12-16 Yu-Chen Lu , Sheng-Feng Yu , Hui-Hsien Weng , Pei-Shuo Wang , Yu-Fang Hu , Liang Hung-Chun , Hung-Yueh Chiang , Kai-Chiang Wu

Large Language Model (LLM) inference is increasingly constrained by memory bandwidth, with frequent access to the key-value (KV) cache dominating data movement. While attention sparsity reduces some memory traffic, the relevance of past…

Hardware Architecture · Computer Science 2025-09-16 Yunhua Fang , Rui Xie , Asad Ul Haq , Linsen Ma , Kaoutar El Maghraoui , Naigang Wang , Meng Wang , Liu Liu , Tong Zhang

Large Language Models (LLMs) have made remarkable progress in processing extensive contexts, with the Key-Value (KV) cache playing a vital role in enhancing their performance. However, the growth of the KV cache in response to increasing…

Computation and Language · Computer Science 2024-06-18 Yuhong Li , Yingbing Huang , Bowen Yang , Bharat Venkitesh , Acyr Locatelli , Hanchen Ye , Tianle Cai , Patrick Lewis , Deming Chen