Related papers: The design of a time-interleaved analog-digital co…

Time-of-flight measurement is an important advancement in PET scanners to improve image reconstruction with a lower delivered radiation dose. This article describes the monolithic ASIC for the TT-PET project, a novel idea for a…

We propose a new digital-to-analog converter (DAC) for realizing a synapse circuit of mixed-signal spiking neural networks. We named this circuit "time-domain DAC (TDAC)". This produces weights for converting a digital input code into…

This paper proposes a high-speed transceiver-based method for implementing a digital-to-time converter (DTC). A real-time decoding technique is introduced to inject time information into high-speed pattern data. The stability of the…

Positron emission tomography (PET) serves as an essential tool for diagnosis of encephalopathy and brain science research. However, it suffers from the limited choice of tracers. Nowadays, with the wide application of PET imaging in…

Analog multiplexing appears to be a promising solution for modern transmitters, where speed is the primary limitation. The objective is the development of a low-cost solution to compare different digital to analog (DAC) schemes. In…

We present the ARAGORN front-end, a cost-optimized, high-density Time-to-Digital Converter platform. Four Xilinx Artix-7 FPGAs implement 384 channels with an average time resolution of 165 ps on a single module. A fifth FPGA acts as data…

As an important part of the field programmable gate array (FPGA) market, Intel FPGA has also great potential for implementation of time-to-digital convertor (TDC). In this paper, the basic tapped delay line (TDL) TDC structure is adapted in…

A highly integrated, high performance, and re-configurable device, which is designed for the Nitrogen-Vacancy center based quantum applications, is reported. The digital compartment of the device is fully implemented in a…

Digital correlators play a significant role in dynamic light scattering (DLS) technology, which characterizes particle size distribution. We present a field programmable gate array (FPGA)-based digital correlator that can be applied to…

We present the second prototype of a time-to-digital (TDC) ASIC for the upgrade of the ATLAS Monitored Drift Tube (MDT) detector for High-Luminosity LHC operations. Compared to the first prototype, triple modular redundancy has been…

The burgeoning interest within the space community in digital beamforming is largely attributable to the superior flexibility that satellites with active antenna systems offer for a wide range of applications, notably in communication…

A Time to Digital Converter was designed (CMOS 0.35 $\mum) in order to be used in Liquid Xenon PET prototype. The circuit proved to be able to work at -120 degrees C, while showing a resolution of 250 ps. The circuit enables a low readout…

We report on the development of a novel FPGA-based Time-to-Digital Converter and its implementation in a detection chain that records the coordinates of single particles along three dimensions. The detector is composed of Micro-Channel…

We present the prototype of a time-to-digital (TDC) ASIC for the upgrade of the ATLAS Monitored Drift Tube (MDT) detector for high-luminosity LHC operation. This ASIC is based on a previously submitted demonstrator ASIC designed for timing…

Modern PET scanners based on scintillating crystals use solid state photo detectors for light readout. The small area of these devices is beneficial for spatial resolution, but also leads to a large number of electronic channels to be read…

Time-tagging units and coincidence detectors are used in many scientific research fields. The required timing resolution and number of input channels are varying, but some emerging experiments in the field of quantum optics require up to 32…

In this paper, we propose an architecture for FPGA emulation of mixed-signal systems that achieves high accuracy at a high throughput. We represent the analog output of a block as a superposition of step responses to changes in its analog…

This paper presents the uTCA4.0-based BPM electronics for PIP-II, featuring four 250 MSPS ADCs and a Xilinx UltraScale+ MPSoC FPGA with 10 GbE uplink. Design elements include signal conditioning, clock, and thermal management. The FPGA…

A 33.6 ps LSB Time-to-Digital converter was designed in 130 nm BiCMOS technology. The core of the converter is a differential 9-stage ring oscillator, based on a multi-path architecture. A novel version of this design is proposed, along…

The increasing demand for cryogenic electronics in superconducting and quantum computing systems calls for ultra energy efficient data conversion architectures that remain functional at deep cryogenic temperatures.In this work, we present…