Related papers: The design of a time-interleaved analog-digital co…

Time-domain reflectometry (TDR) is an established means of measuring impedance inhomogeneity of a variety of waveguides, providing critical data necessary to characterize and optimize the performance of high-bandwidth computational and…

Analog-to-digital converters (ADCs) are key components of digital signal processing. Classical samplers in this framework are controlled by a global clock. At high sampling rates, clocks are expensive and power-hungry, thus increasing the…

Time and charge measurements over a large dynamic range from 1 Photo Electron (P.E.) to 4000 P.E. are required for the Water Cherenkov Detector Array (WCDA), which is one of the key components in the Large High Altitude Air Shower…

Development of readout electronics for Time Projection Chamber for a Linear Collider is ongoing under stringent requirements on high channel density, lowest possible power consumption and small material budget. In the studied TPC readout…

This work presents the design and preliminary performance of a highly-multiplexed superconducting detector readout. The readout system is implemented on the Xilinx ZCU111 RFSoC Evaluation Board. The current design uses 12% of the DSPs, 60%…

With present-day detectors in high energy physics one often faces fast analog pulses of a few nanoseconds length which cover large dynamic ranges. In many experiments both amplitude and timing information have to be measured with high…

This paper proposes and evaluates a novel architecture for a low-power Time-to-Digital Converter with high resolution, optimized for both integration in multichannel chips and high rate operation (40 Mconversion/s/channel). This converter…

This work presents the 8-channel FastIC+, a low-power consumption and highly configurable multi-channel front-end ASIC with internal digitization, for the readout of photo-sensors with picosecond time resolution and intrinsic gain. This…

Small animal Positron Emission Tomography (PET) is dedicated to small animal imaging, which requires high position and energy precision, as well as good flexibility and efficiency of the electronics. This paper presents the design of a…

We have designed, implemented and tested a time-to-digital converter core in a low-cost Spartan-6 FPGA. Our design exploits the finite propagation speed in carry chains to realize a delay line in which the propagation distance of the…

Single photon detector (SPD) has a maximum count rate due to its dead time, which results in that the dynamic range of photon counting optical time-domain reflectometry (PC-OTDR) de-creases with the length of monitored fiber. To further…

Many scientific and astronomical instruments need precise time measurement with high resolution between two or more events which is very challenging since decades. Presently a fast response of high resolution 17.1ps Digital Event Timer…

This manuscript describes a radiation-hardened current-mode delta-sigma ADC fabricated in a standard 130 nm CMOS technology and qualified for total ionizing doses up to 100 Mrad. The operational signal range achieved with a 100 s…

In this article it is presented an FPGA based $M$ulti-$V$oltage $T$hreshold (MVT) system which allows of sampling fast signals ($1-2$ ns rising and falling edge) in both voltage and time domain. It is possible to achieve a precision of time…

One of the many limitations with the mixed-signal design is physically testing circuit ideas. While it is easier to test digital circuits with FPGAs, this can not be done usually with mixed-signal circuits. Although some FPGAs have built-in…

An ADC is used to convert analog signals into binary signals. Compared with many other types of ADCs, flash converters are incredibly quick. A typical Flash ADC consists of 2n resistors, 2n-1 op-amp comparators, and an encoder which…

The need for wireless communication has driven the communication systems to high performance. However, the main bottleneck that affects the communication capability is the Fast Fourier Transform (FFT), which is the core of most modulators.…

A Time to Digital Converter (TDC) based system, to be used for most sub-detectors in the high-flux rare-decay experiment NA62 at CERN SPS, was built as part of the NA62 fully digital Trigger and Data AcQuisition system (TDAQ), in which the…

This paper presents a discrete-time analog frontend for an analog-to-digital (ADC) based equalizers. The frontend uses a discrete-time linear equalizer (DTLE) and ultralow-power 4-bit time-interleaved charge-steering flash ADC. The DTLE…

This paper presents several new structures to pursue high-resolution (< 2 ps) time-to-digital converters (TDCs) in Xilinx 20 nm UltraScale field-programmable gate arrays (FPGAs). The proposed TDCs combined the advantages of 1) our newly…