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Hardware failures are a growing challenge for machine learning accelerators, many of which are based on systolic arrays. When a permanent hardware failure occurs in a systolic array, existing solutions include localizing and isolating the…

Machine Learning · Computer Science 2024-12-24 Youssef A. Ait Alama , Sampada Sakpal , Ke Wang , Razvan Bunescu , Avinash Karanth , Ahmed Louri

Deep neural networks (DNNs) offer plenty of challenges in executing efficient computation at edge nodes, primarily due to the huge hardware resource demands. The article proposes HYDRA, hybrid data multiplexing, and runtime layer…

Hardware Architecture · Computer Science 2026-03-31 Sonu Kumar , Komal Gupta , Gopal Raut , Mukul Lokhande , Santosh Kumar Vishvakarma

We propose a distributed system based on lowpower embedded FPGAs designed for edge computing applications focused on exploring distributing scheduling optimizations for Deep Learning (DL) workloads to obtain the best performance regarding…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-05-31 Hans Johnson , Tianyang Fang , Alejandro Perez-Vicente , Jafar Saniie

The emergence of Deep Neural Networks (DNNs) in mission- and safety-critical applications brings their reliability to the front. High performance demands of DNNs require the use of specialized hardware accelerators. Systolic array…

Hardware Architecture · Computer Science 2025-11-05 Natalia Cherezova , Artur Jutman , Maksim Jenihhin

Elementary Cellular Automata (ECA) are a well-studied computational universe that is, despite its simple configurations, capable of impressive computational variety. Harvesting this computation in a useful way has historically shown itself…

Cellular Automata and Lattice Gases · Physics 2024-07-26 Tom Eivind Glover , Ruben Jahren , Francesco Martinuzzi , Pedro Gonçalves Lind , Stefano Nichele

The system-level cache is a critical resource shared by processor cores and domain-specific accelerators in heterogeneous systems on chips (SoCs). The strict QoS requirements of accelerators, such as deadlines, can lead to severe…

Hardware Architecture · Computer Science 2026-05-21 Ayushi Agarwal , Anannya Mathur , Preeti Ranjan Panda

Edge computing devices inherently face tight resource constraints, which is especially apparent when deploying Deep Neural Networks (DNN) with high memory and compute demands. FPGAs are commonly available in edge devices. Since these…

Hardware Architecture · Computer Science 2021-10-04 Jude Haris , Perry Gibson , José Cano , Nicolas Bohm Agostini , David Kaeli

The emergence of heterogeneity and domain-specific architectures targeting deep learning inference show great potential for enabling the deployment of modern CNNs on resource-constrained embedded platforms. A significant development is the…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-07-25 Dmitri Lyalikov

A large amount of data is generated during the operation of a railcar fleet, which can easily lead to dimensional disaster and reduce the resiliency of the railcar network. To solve these issues and offer predictive maintenance, this…

Production LLM deployments increasingly maintain heterogeneous model pools spanning order-of-magnitude cost differences. Existing routers make binary strong-vs-weak decisions and couple learned parameters to specific model identities,…

Computation and Language · Computer Science 2026-05-19 Aashna Garg , Siddharth Singha Roy , Jinu Jang , Federico Brancasi , Shengyu Fu

Anomaly detection in distributed systems such as High-Performance Computing (HPC) clusters is vital for early fault detection, performance optimisation, security monitoring, reliability in general but also operational insights. Deep Neural…

Machine Learning · Computer Science 2024-05-14 Franz Kevin Stehle , Wainer Vandelli , Giuseppe Avolio , Felix Zahn , Holger Fröning

There are limitations of traditional methods and deep learning methods in terms of interpretability, generalization, and quantification of uncertainty in industrial fault diagnosis, and there are core problems of insufficient credibility in…

Systems and Control · Electrical Eng. & Systems 2025-10-07 Yue wu

Two-fold redundant sparse arrays possess inbuilt redundancy to tackle single-element failures. This property enables them to perform accurate direction of arrival (DOA) estimation even during single sensor faults. However, recent literature…

Signal Processing · Electrical Eng. & Systems 2026-04-28 Namya Malik , Ashish Patwari , Sangeetha N

Emerging AI-enabled applications such as augmented/virtual reality (AR/VR) leverage multiple deep neural network (DNN) models for sub-tasks such as object detection, hand tracking, and so on. Because of the diversity of the sub-tasks, the…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-12-18 Hyoukjun Kwon , Liangzhen Lai , Michael Pellauer , Tushar Krishna , Yu-Hsin Chen , Vikas Chandra

Current approaches to scheduling workloads on heterogeneous systems with specialized accelerators often rely on manual partitioning, offloading tasks with specific compute patterns to accelerators. This method requires extensive…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-02-12 Zhenyu Bai , Dan Wu , Pranav Dangi , Dhananjaya Wijerathne , Venkata Pavan Kumar Miriyala , Tulika Mitra

Flexibility and customization are key strengths of Field-Programmable Gate Arrays (FPGAs) when compared to other computing devices. For instance, FPGAs can efficiently implement arbitrary-precision arithmetic operations, and can perform…

Hardware Architecture · Computer Science 2025-07-17 Junius Pun , Xilai Dai , Grace Zgheib , Mahesh A. Iyer , Andrew Boutros , Vaughn Betz , Mohamed S. Abdelfattah

Conventional document layout analysis (DLA) traditionally depends on empirical priors or a fixed set of learnable queries executed in a single forward pass. While sufficient for early-generation documents with a small, predetermined number…

Computer Vision and Pattern Recognition · Computer Science 2025-11-26 Yufan Chen , Omar Moured , Ruiping Liu , Junwei Zheng , Kunyu Peng , Jiaming Zhang , Rainer Stiefelhagen

With the rapid advancements of deep learning in the past decade, it can be foreseen that deep learning will be continuously deployed in more and more safety-critical applications such as autonomous driving and robotics. In this context,…

Hardware Architecture · Computer Science 2022-04-06 Cheng Liu , Zhen Gao , Siting Liu , Xuefei Ning , Huawei Li , Xiaowei Li

Deploying DNNs on System-on-Chips (SoC) with multiple heterogeneous acceleration engines is challenging, and the majority of deployment frameworks cannot fully exploit heterogeneity. We present MATCHA, a unified DNN deployment framework…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-04-13 Enrico Russo , Mohamed Amine Hamdi , Alessandro Ottaviano , Francesco Conti , Angelo Garofalo , Daniele Jahier Pagliari , Maurizio Palesi , Luca Benini , Alessio Burrello

Dataflow architectures are growing in popularity due to their potential to mitigate the challenges posed by the memory wall inherent to the Von Neumann architecture. At the same time, high-level synthesis (HLS) has demonstrated its efficacy…

Hardware Architecture · Computer Science 2023-11-08 Hanchen Ye , Hyegang Jun , Deming Chen
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