Deploying DNNs on System-on-Chips (SoC) with multiple heterogeneous acceleration engines is challenging, and the majority of deployment frameworks cannot fully exploit heterogeneity. We present MATCHA, a unified DNN deployment framework that generates highly concurrent schedules for parallel, heterogeneous accelerators and uses constraint programming to optimize L3/L2 memory allocation and scheduling. Using pattern matching, tiling, and mapping across individual HW units enables parallel execution and high accelerator utilization. On the MLPerf Tiny benchmark, using a SoC with two heterogeneous accelerators, MATCHA improves accelerator utilization and reduces inference latency by up to 35% with respect to the the state-of-the-art MATCH compiler.
@article{arxiv.2604.09124,
title = {MATCHA: Efficient Deployment of Deep Neural Networks on Multi-Accelerator Heterogeneous Edge SoCs},
author = {Enrico Russo and Mohamed Amine Hamdi and Alessandro Ottaviano and Francesco Conti and Angelo Garofalo and Daniele Jahier Pagliari and Maurizio Palesi and Luca Benini and Alessio Burrello},
journal= {arXiv preprint arXiv:2604.09124},
year = {2026}
}
Comments
Accepted at the 63rd ACM/IEEE Design Automation Conference (DAC26)