Related papers: 3D logic cells design and results based on Vertica…
We report on the electronic transport properties of multiple-gate devices fabricated from undoped silicon nanowires. Understanding and control of the relevant transport mechanisms was achieved by means of local electrostatic gating and…
Several nanoelectronic devices have been already proved. However, no architecture which makes use of them provides a feasible opportunity to build medium/large systems. Nanoarchitecture proposals only solve a small part of the problems…
We report here the first realization of top-down silicon nanowires (SiNW) transduced by both junction-less field effect transistor (FET) and the piezoresistive (PZR) effect. The suspended SiNWs are among the smallest top-down SiNWs reported…
The rapid growth of LLMs demands high-throughput, memory-capacity-intensive inference on resource-constrained edge devices, where single-batch decoding remains fundamentally memory-bound. Existing out-of-core GPU-based and SSD-like…
Numerical simulations have become an essential design tool in the field of photonics, especially for nanophotonics. In particular, 3D finite-difference-time-domain (FDTD) simulations are popular for their powerful design capabilities.…
We have used a simple, analytically solvable model to analyze the characteristic s of dual-gate metal-oxide-semiconductor field-effect transistors (MOSFETs) with 10-nm-scale channel length L. The model assumes ballistic dynamics of 2D…
A vertical partial gate carbon nanotube (CNT) field-effect transistor (FET), which is amenable to the vertical CNT growth process and offers the potential for a parallel CNT array channel, is simulated using a self-consistent atomistic…
Bandstructure effects in PMOS transport of strongly quantized silicon nanowire field-effect-transistors (FET) in various transport orientations are examined. A 20-band sp3d5s* spin-orbit-coupled (SO) atomistic tight-binding model coupled to…
This paper presents a novel design concept for spintronic nanoelectronics that emphasizes a seamless integration of spin-based memory and logic circuits. The building blocks are magneto-logic gates based on a hybrid graphene/ferromagnet…
Capacitance-voltage characteristics of individual germanium nanowire field effect transistors were directly measured and used to assess carrier mobility in nanowires for the first time; thereby removing uncertainties in calculated mobility…
The current research work encompasses design modelling and fabrication of vertically aligned nanowire metal oxide semiconductor based voltage tunable quantum dot devices for optoelectronic applications. A novel device scheme is proposed for…
Steep-slope $\beta$-Ga$_2$O$_3$ nano-membrane negative capacitance field-effect transistors (NC-FETs) are demonstrated with ferroelectric hafnium zirconium oxide in gate dielectric stack. Subthreshold slope less than 60 mV/dec at room…
Two-dimensional (2D) materials, such as molybdenum disulfide (MoS2), have been shown to exhibit excellent electrical and optical properties. The semiconducting nature of MoS2 allows it to overcome the shortcomings of zero-bandgap graphene,…
We propose a semi-suspended device structure and construct nanogapped, hysteresis-free field-effect transistors (FETs), based on the van der Waals stacking technique. The structure, which features a semi-suspended channel above a…
This work presents a novel general compact model for 7nm technology node devices like FinFETs. As an extension of previous conventional compact model that based on some less accurate elements including one-dimensional Poisson equation for…
We propose and numerically simulate novel reconfigurable logic gates employing spin metal-oxide-semiconductor field-effect transistors (spin MOSFETs). The output characteristics of the spin MOSFETs depend on the relative magnetization…
As the conventional scaling of logic devices comes to an end, functional wafer backside and 3D transistor stacking are consensus for next-generation logic technology, offering considerable design space extension for powers, signals or even…
We review principles and trends in the use of semiconductor nanowires (NWs) as gain media for stimulated emission and lasing. Semiconductor nanowires have recently been widely studied for use in integrated optoelectronic devices, such as…
Complementary metal oxide semiconductor technology (CMOS) has been faced critical challenges in nano-scale regime. CNTFET (Carbon Nanotube Field effect transistor) technology is a promising alternative for CMOS technology. In this paper, we…
Graphene field-effect transistors are integrated with solution-processed multilayer hybrid organic-inorganic self-assembled nanodielectrics (SANDs). The resulting devices exhibit low-operating voltage (2 V), negligible hysteresis, current…