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Serial connection of multiple memory cells using perpendicular magnetic tunnel junctions (pMTJ) is proposed as a way to increase magnetic random access memory (MRAM) storage density. Multi-bit storage element is designed using pMTJs…

The complementary field-effect transistors (CFETs), featuring vertically stacked n/p-FETs, enhance integration density and significantly reduce the area of standard cells such as static random-access memory (SRAM). However, the advantage of…

We propose and computationally analyze a nonvolatile static random access memory (NV-SRAM) cell using magnetic tunnel junctions (MTJs) with magnetic-field-free current-induced magnetization switching (CIMS) architecture. A pair of MTJs…

A non-volatile SRAM cell is proposed for low power applications using Spin Transfer Torque-Magnetic Tunnel Junction (STT-MTJ) devices. This novel cell offers non-volatile storage, thus allowing selected blocks of SRAM to be switched off…

The Last Level Cache (LLC) is the processor's critical bridge between on-chip and off-chip memory levels - optimized for high density, high bandwidth, and low operation energy. To date, high-density (HD) SRAM has been the conventional…

As an emerging non-volatile memory technology, magnetic random access memory (MRAM) has key features and advantages including non-volatility, high speed, endurance, low power consumption and radiation tolerance. Conventional MRAM utilizes…

This paper summarizes the idea of Adaptive-Latency DRAM (AL-DRAM), which was published in HPCA 2015. The key goal of AL-DRAM is to exploit the extra margin that is built into the DRAM timing parameters to reduce DRAM latency. The key…

Arrays of Vortex Transitional (VT) memory cells with functional density up to $1 Mbit/cm^2$ have been designed, fabricated, and successfully demonstrated. This progress is due to recent advances in design optimization and in superconductor…

Spin transfer torque magnetic random access memory (STT-MRAM) is considered as one of the most promising candidates to build up a true universal memory thanks to its fast write/read speed, infinite endurance and non-volatility. However the…

Sub/Near-threshold static random-access memory (SRAM) design is crucial for addressing the memory bottleneck in energy-constrained applications. However, the high integration density and reliability under process variations demand an…

This paper summarizes the idea of Adaptive-Latency DRAM (AL-DRAM), which was published in HPCA 2015, and examines the work's significance and future potential. AL-DRAM is a mechanism that optimizes DRAM latency based on the DRAM module and…

A programmable linear resistor with a compact footprint would have profound implications for microelectronics, enabling efficient in-sensor analog signal processing and in-memory computing. Non-volatile memory offers a potential solution…

In this study, we proposed and demonstrated a self-rectifying property of silicon nitride (Si3N4)-based resistive random access memory device by employing p-type silicon (p-Si) as bottom electrode. The RRAM devices consisted of…

In-memory computing (IMC) is an effectual solution for energy-efficient artificial intelligence applications. Analog IMC amortizes the power consumption of multiple sensing amplifiers with analog-to-digital converter (ADC), and…

Approximate computing (AC) leverages the inherent error resilience and is used in many big-data applications from various domains such as multimedia, computer vision, signal processing, and machine learning to improve systems performance…

The SRAM cell is made up of latch, which ensures that the cell data is preserved as long as power is turned on and refresh operation is not required for the SRAM cell. SRAM is widely used for on-chip cache memory in microprocessors, game…

This study investigates strategies for minimizing Joule losses in resistive random access memory (ReRAM) cells, which are also referred to as memristive devices. Typically, the structure of ReRAM cells involves a nanoscale layer of…

Superconducting digital Pulse-Conserving Logic (PCL) and Josephson SRAM (JSRAM) memory together enable scalable circuits with energy efficiency 100x beyond leading-node CMOS. Circuit designs support high throughput and low latency when…

In this paper, we report the effect of write voltage and frequency on memristor based Resistive Random Access Memory (RRAM). The above said parameters have been investigated on the linear drift model of memristor. With a variation of write…

We propose spin transfer torque--magnetoresistive random access memory (STT-MRAM) based on magneto-resistance and spin transfer torque physics of band-pass spin filtering. Utilizing the electronic analogs of optical phenomena such as…