Related papers: Cryo-CMOS Band-gap Reference Circuits for Quantum …

The bandwidth limit between cryogenic and room-temperature environments is a critical bottleneck in superconducting noisy intermediate-scale quantum computers. This paper presents the first trial of algorithm-aware system-level optimization…

Current state-of-the-art superconducting microwave qubits are cooled to extremely low temperatures to avoid sources of decoherence. Higher qubit operating temperatures would significantly increase the cooling power available, which is…

A robust cryogenic infrastructure in form of a wired, thermally optimized dilution refrigerator is essential for present and future solid-state based quantum processors. Here, we engineer an extensible cryogenic setup, which minimizes…

Solid-state quantum computers require classical electronics to control and readout individual qubits and to enable fast classical data processing [1-3]. Integrating both subsystems at deep cryogenic temperatures [4], where solid-state…

Current superconducting quantum computing platforms face significant scaling challenges, as individual signal lines are required for control of each qubit. This wiring overhead is a result of the low level of integration between control…

This paper presents a comprehensive cryogenic analog signal processing architecture designed for superconducting qubit control and quantum state readout operating at 4 Kelvin. The proposed system implements a complete bidirectional signal…

When designing and studying circuits operating at cryogenic temperatures understanding local heating within the circuits is critical due to the temperature dependence of transistor and noise behavior. We have investigated local heating…

Superconducting quantum computers require microwave control lines running from room temperature to the mixing chamber of a dilution refrigerator. Adding more lines without preliminary thermal modeling to make predictions risks overwhelming…

Quantum computing qubits are notoriously fragile, requiring extreme isolation from environmental disturbances. This paper advances the hypothesis that a combination of microgravity and ultra-low temperature (near absolute zero) provides an…

This paper presents an extensive characterization and modeling of a commercial 28-nm FDSOI CMOS process operating down to cryogenic temperatures. The important cryogenic phenomena influencing this technology are discussed. The…

In the strive for scalable quantum processors, significant effort is being devoted to the development of cryogenic classical hardware for the control and readout of a growing number of qubits. Here we report on a cryogenic circuit…

The challenges of operating qubits in a cryogenic environment point to a looming bottleneck for large-scale quantum processors, limited by the number of input-output connections. Classical processors solve this problem via multiplexing;…

In this letter, we characterize the electrical properties of commercial bulk 40-nm MOSFETs at room and deep cryogenic temperatures, with a focus on quantum information processing (QIP) applications. At 50 mK, the devices operate as…

Conventional CMOS technology operated at cryogenic conditions has recently attracted interest for its uses in low-noise electronics. We present one of the first characterizations of 180 nm CMOS technology at a temperature of 100 mK,…

Qubit control electronics composed of CMOS circuits are of critical interest for next generation quantum computing systems. A CMOS-based application specific integrated circuit (ASIC) fabricated in 14nm FinFET technology was used to…

A novel power-efficient analog buffer at liquid helium temperature is proposed. The proposed circuit is based on an input stage consisting of two complementary differential pairs to achieve rail-to-rail level tracking. Results of simulation…

Quantum processing units will be modules of larger information processing systems containing also digital and analog electronics modules. Silicon-based quantum computing offers the enticing opportunity to manufacture all the modules using…

This paper presents a novel approach utilizing a scalable neural decoder application-specific integrated circuit (ASIC) based on metal oxide memristors in a 180nm CMOS technology. The ASIC architecture employs in-memory computing with…

This paper presents the first experimental investigation and physical discussion of the cryogenic behavior of a commercial 28 nm bulk CMOS technology. Here we extract the fundamental physical parameters of this technology at 300, 77 and 4.2…

The scaleup of quantum computers operating in the microwave domain requires advanced control electronics, and the use of integrated components that operate at the temperature of the quantum devices is potentially beneficial. However, such…