English

Inter-temperature Bandwidth Reduction in Cryogenic QAOA Machines

Quantum Physics 2023-10-12 v1 Hardware Architecture

Abstract

The bandwidth limit between cryogenic and room-temperature environments is a critical bottleneck in superconducting noisy intermediate-scale quantum computers. This paper presents the first trial of algorithm-aware system-level optimization to solve this issue by targeting the quantum approximate optimization algorithm. Our counter-based cryogenic architecture using single-flux quantum logic shows exponential bandwidth reduction and decreases heat inflow and peripheral power consumption of inter-temperature cables, which contributes to the scalability of superconducting quantum computers.

Keywords

Cite

@article{arxiv.2310.01630,
  title  = {Inter-temperature Bandwidth Reduction in Cryogenic QAOA Machines},
  author = {Yosuke Ueno and Yuna Tomida and Teruo Tanimoto and Masamitsu Tanaka and Yutaka Tabuchi and Koji Inoue and Hiroshi Nakamura},
  journal= {arXiv preprint arXiv:2310.01630},
  year   = {2023}
}

Comments

4 pages, 5 figures, 1 table. Accepted by IEEE Computer Architecture Letters,

R2 v1 2026-06-28T12:38:53.147Z