The challenges of operating qubits in a cryogenic environment point to a looming bottleneck for large-scale quantum processors, limited by the number of input-output connections. Classical processors solve this problem via multiplexing; however, on-chip multiplexing circuits have not been shown to have similar benefits for cryogenic quantum devices. In this work we integrate classical circuitry and Si/SiGe quantum devices on the same chip, providing a test bed for qubit scale-up. Our method uses on-chip field-effect transistors (FETs) to multiplex a grid of work zones, achieving a nearly tenfold reduction in control wiring. We leverage this set-up to probe device properties across a 6x6mm2 array of 16 Hall bars. We successfully operate the array at cryogenic temperatures and high magnetic fields where the quantum Hall effect is observed. Building upon these results, we propose a vision for readout in a large-scale silicon quantum processor with a limited number of control connections.
@article{arxiv.2410.13721,
title = {On-chip cryogenic multiplexing of Si/SiGe quantum devices},
author = {M. A. Wolfe and Thomas McJunkin and Daniel R. Ward and DeAnna Campbell and Mark Friesen and M. A. Eriksson},
journal= {arXiv preprint arXiv:2410.13721},
year = {2024}
}