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We present a full-stack optimization framework for accelerating inference of CNNs (Convolutional Neural Networks) and validate the approach with field-programmable gate arrays (FPGA) implementations. By jointly optimizing CNN models,…

Machine Learning · Computer Science 2019-05-03 Bradley McDanel , Sai Qian Zhang , H. T. Kung , Xin Dong

Simultaneous Localization and Mapping (SLAM) estimates agents' trajectories and constructs maps, and localization is a fundamental kernel in autonomous machines at all computing scales, from drones, AR, VR to self-driving cars. In this…

Hardware Architecture · Computer Science 2022-04-18 Qiang Liu , Zishen Wan , Bo Yu , Weizhuang Liu , Shaoshan Liu , Arijit Raychowdhury

Forget and Rewire (FaR) methodology has demonstrated strong resilience against Bit-Flip Attacks (BFAs) on Transformer-based models by obfuscating critical parameters through dynamic rewiring of linear layers. However, the application of FaR…

Neural Networks (NN) provide a solid and reliable way of executing different types of applications, ranging from speech recognition to medical diagnosis, speeding up onerous and long workloads. The challenges involved in their…

Hardware Architecture · Computer Science 2023-09-26 Federico Manca , Francesco Ratto

Most of the existing work on FPGA acceleration of Convolutional Neural Network (CNN) focus on employing a single strategy (algorithm, dataflow, etc.) across all the layers. Such an approach does not achieve optimal latency on complex and…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-03-16 Yuan Meng , Sanmukh Kuppannagari , Rajgopal Kannan , Viktor Prasanna

Recurrent Neural Networks (RNNs) are becoming increasingly important for time series-related applications which require efficient and real-time implementations. The two major types are Long Short-Term Memory (LSTM) and Gated Recurrent Unit…

Computer Vision and Pattern Recognition · Computer Science 2018-12-19 Zhe Li , Caiwen Ding , Siyue Wang , Wujie Wen , Youwei Zhuo , Chang Liu , Qinru Qiu , Wenyao Xu , Xue Lin , Xuehai Qian , Yanzhi Wang

State Space Models (SSMs) offer a promising alternative to transformers for long-sequence processing. However, their efficiency remains hindered by memory-bound operations, particularly in the prefill stage. While MARCA, a recent first…

Hardware Architecture · Computer Science 2026-04-10 Robin Geens , Arne Symons , Marian Verhelst

With increasing diversity in Deep Neural Network(DNN) models in terms of layer shapes and sizes, the research community has been investigating flexible/reconfigurable accelerator substrates. This line of research has opened up two…

Hardware Architecture · Computer Science 2022-04-26 Ananda Samajdar , Michael Pellauer , Tushar Krishna

In natural language processing (NLP), the "Transformer" architecture was proposed as the first transduction model replying entirely on self-attention mechanisms without using sequence-aligned recurrent neural networks (RNNs) or convolution,…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-07-20 Bingbing Li , Santosh Pandey , Haowen Fang , Yanjun Lyv , Ji Li , Jieyang Chen , Mimi Xie , Lipeng Wan , Hang Liu , Caiwen Ding

RRAM crossbars have been studied to construct in-memory accelerators for neural network applications due to their in-situ computing capability. However, prior RRAM-based accelerators show efficiency degradation when executing the popular…

Hardware Architecture · Computer Science 2024-02-01 Yifeng Zhai , Bing Li , Bonan Yan , Jing Wang

The rise of deep neural networks (DNNs) has driven an increased demand for computing power and memory. Modern DNNs exhibit high data volume variation (HDV) across tasks, which poses challenges for FPGA acceleration: conventional…

Hardware Architecture · Computer Science 2025-04-08 Zifan He , Anderson Truong , Yingqi Cao , Jason Cong

FPGA architectures have recently been enhanced to meet the substantial computational demands of modern deep neural networks (DNNs). To this end, both FPGA vendors and academic researchers have proposed in-fabric blocks that perform…

Hardware Architecture · Computer Science 2025-02-07 Endri Taka , Ning-Chi Huang , Chi-Chih Chang , Kai-Chiang Wu , Aman Arora , Diana Marculescu

Spiking Neural Networks (SNNs) promise significant advantages over conventional Artificial Neural Networks (ANNs) for applications requiring real-time processing of temporally sparse data streams under strict power constraints -- a concept…

Neural and Evolutionary Computing · Computer Science 2026-04-07 Brian Pachideh , Sven Nitzsche , Moritz Neher , Jann Krausse , Carmen Weigelt , Klaus Knobloch , Victor Pazmino Betancourt , Juergen Becker

Sparsity is a growing trend in modern DNN models. Existing Sparse-Sparse Matrix Multiplication (SpMSpM) accelerators are tailored to a particular SpMSpM dataflow (i.e., Inner Product, Outer Product or Gustavsons), that determines their…

Hardware Architecture · Computer Science 2023-01-27 Francisco Muñoz-Martínez , Raveesh Garg , José L. Abellán , Michael Pellauer , Manuel E. Acacio , Tushar Krishna

Brain-inspired computing proposes a set of algorithmic principles that hold promise for advancing artificial intelligence. They endow systems with self learning capabilities, efficient energy usage, and high storage capacity. A core concept…

Neural and Evolutionary Computing · Computer Science 2022-12-01 Younes Bouhadjar , Sebastian Siegel , Tom Tetzlaff , Markus Diesmann , Rainer Waser , Dirk J. Wouters

Spiking neural networks (SNNs) exploit event-driven and addition-only computation to substantially improve efficiency for intelligent computation. A key temporal property of SNNs, elastic inference, allows outputs to emerge progressively,…

Hardware Architecture · Computer Science 2026-05-21 Kang You , Chen Nie , Lee Jun Yan , Ziling Wei , Cheng Zou , Zekai Xu , Yu Feng , Honglan Jiang , Zhezhi He

This paper proposes Capstan: a scalable, parallel-patterns-based, reconfigurable dataflow accelerator (RDA) for sparse and dense tensor applications. Instead of designing for one application, we start with common sparse data formats, each…

Hardware Architecture · Computer Science 2021-09-24 Alexander Rucker , Matthew Vilim , Tian Zhao , Yaqi Zhang , Raghu Prabhakar , Kunle Olukotun

Hybrid memory systems, comprised of emerging non-volatile memory (NVM) and DRAM, have been proposed to address the growing memory demand of applications. Emerging NVM technologies, such as phase-change memories (PCM), memristor, and 3D…

Hardware Architecture · Computer Science 2024-03-19 Fei Wen , Mian Qin , Paul V. Gratz , A. L. Narasimha Reddy

Spiking Neural Networks (SNNs) have emerged as a biologically inspired alternative to conventional deep networks, offering event-driven and energy-efficient computation. However, their throughput remains constrained by the serial update of…

Neural and Evolutionary Computing · Computer Science 2026-03-16 Hongyang Shang , Shuai Dong , Yahan Yang , Junyi Yang , Peng Zhou , Arindam Basu

Neural networks (NNs) have demonstrated their potential in a wide range of applications such as image recognition, decision making or recommendation systems. However, standard NNs are unable to capture their model uncertainty which is…

Hardware Architecture · Computer Science 2021-12-02 Hongxiang Fan , Martin Ferianc , Miguel Rodrigues , Hongyu Zhou , Xinyu Niu , Wayne Luk
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