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Processing-in-memory (PIM) has shown extraordinary potential in accelerating neural networks. To evaluate the performance of PIM accelerators, we present an ISA-based simulation framework including a dedicated ISA targeting neural networks…

Hardware Architecture · Computer Science 2024-02-29 Xinyu Wang , Xiaotian Sun , Yinhe Han , Xiaoming Chen

In-memory computing (IMC) utilizing synaptic crossbar arrays is promising for energy-efficient deep neural network (DNN) accelerators. Various technologies (CMOS and post-CMOS) have been explored as synaptic device candidates, each with its…

Emerging Technologies · Computer Science 2024-08-15 Chunguang Wang , Jeffry Victor , Sumeet K. Gupta

In this treatise, my research on methods to improve efficiency, reliability, and security of reconfigurable hardware systems, i.e., FPGAs, through partial dynamic reconfiguration is outlined. The efficiency of reconfigurable systems can be…

Hardware Architecture · Computer Science 2018-10-01 Daniel Ziener

Recurrent Neural Networks and in particular Long Short-Term Memory (LSTM) networks have demonstrated state-of-the-art accuracy in several emerging Artificial Intelligence tasks. However, the models are becoming increasingly demanding in…

Computer Vision and Pattern Recognition · Computer Science 2018-01-10 Michalis Rizakis , Stylianos I. Venieris , Alexandros Kouris , Christos-Savvas Bouganis

Memristor technology shows great promise for energy-efficient computing, yet it grapples with challenges like resistance drift and inherent variability. For filamentary Resistive RAM (ReRAM), one of the most investigated types of memristive…

Recurrent Neural Networks (RNNs) are vital for sequential data processing. Long Short-Term Memory Autoencoders (LSTM-AEs) are particularly effective for unsupervised anomaly detection in time-series data. However, inherent sequential…

Hardware Architecture · Computer Science 2026-03-17 Aimilios Leftheriotis , Dimosthenis Masouros , Dimitrios Soudris , George Theodoridis

Spiking Neural Networks (SNNs) and transformers represent two powerful paradigms in neural computation, known for their low power consumption and ability to capture feature dependencies, respectively. However, transformer architectures…

Hardware Architecture · Computer Science 2025-03-27 Ching-Yao Chen , Meng-Chieh Chen , Tian-Sheuan Chang

Data-intensive applications like distributed AI-training may require multi-terabytes memory capacity with multi-terabits bandwidth. We directly attach the memory to the ethernet controller with some programable logic to design an efficient…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-10-29 Kevin Fang , David Peng

Real-time Deep Neural Network (DNN) inference with low-latency requirement has become increasingly important for numerous applications in both cloud computing (e.g., Apple's Siri) and edge computing (e.g., Google/Waymo's driverless car).…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-02-11 Weiwen Jiang , Edwin H. -M. Sha , Xinyi Zhang , Lei Yang , Qingfeng Zhuge , Yiyu Shi , Jingtong Hu

FPGAs are increasingly gaining traction in cloud and edge computing environments due to their hardware flexibility, low latency, and low energy consumption. However, the existing hardware stack of FPGA and the host-FPGA connectivity does…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-03-04 Masudul Hassan Quraishi , Michael Riera , Fengbo Ren , Aman Arora , Aviral Shrivastava

Transformer neural networks (TNNs) are being applied across a widening range of application domains, including natural language processing (NLP), machine translation, and computer vision (CV). Their popularity is largely attributed to the…

Hardware Architecture · Computer Science 2025-12-22 Ehsan Kabir , Md. Arafat Kabir , Austin R. J. Downey , Jason D. Bakos , David Andrews , Miaoqing Huang

For over a decade, explicit memory architectures like the Neural Turing Machine have remained theoretically appealing yet practically intractable for language modeling due to catastrophic gradient instability during Backpropagation Through…

Machine Learning · Computer Science 2026-05-14 Sungwoo Goo , Hwi-yeol Yun , Sangkeun Jung

As machine learning applications continue to evolve, the demand for efficient hardware accelerators, specifically tailored for deep neural networks (DNNs), becomes increasingly vital. In this paper, we propose a configurable memory…

Hardware Architecture · Computer Science 2024-04-25 Oliver Bause , Paul Palomero Bernardo , Oliver Bringmann

Stochastic computing (SC) offers significant reductions in hardware complexity for traditional convolutional neural networks(CNNs). However, despite its advantages, stochastic computing neural networks (SCNNs) often suffer from high…

Hardware Architecture · Computer Science 2026-01-29 Sheng Lu , Qianhou Qu , Sungyong Jung , Qilian Liang , Chenyun Pan

Recent advances in reprogrammable hardware (e.g., FPGAs) and memory technology (e.g., DDR4, HBM) promise to solve performance problems inherent to graph processing like irregular memory access patterns on traditional hardware (e.g., CPU).…

Hardware Architecture · Computer Science 2021-04-19 Jonas Dann , Daniel Ritter , Holger Fröning

In this paper, the acceleration of algorithms using a design of a field programmable gate array (FPGA) as a prototype of a static dataflow architecture is discussed. The static dataflow architecture using operators interconnected by…

Hardware Architecture · Computer Science 2015-03-13 Jorge Luiz e Silva , Joelmir Jose Lopes , Bruno de Abreu Silva , Antonio Carlos Fernandes da Silva

High Performance Computing (HPC) platforms allow scientists to model computationally intensive algorithms. HPC clusters increasingly use General-Purpose Graphics Processing Units (GPGPUs) as accelerators; FPGAs provide an attractive…

Hardware Architecture · Computer Science 2015-04-20 Syed Waqar Nabi , Saji N. Hameed , Wim Vanderbauwhede

The second-order training methods can converge much faster than first-order optimizers in DNN training. This is because the second-order training utilizes the inversion of the second-order information (SOI) matrix to find a more accurate…

Hardware Architecture · Computer Science 2022-10-28 Yilong Zhao , Li Jiang , Mingyu Gao , Naifeng Jing , Chengyang Gu , Qidong Tang , Fangxin Liu , Tao Yang , Xiaoyao Liang

Modern deep learning models have high memory and computation cost. To make them fast and memory-cost efficient, structured model pruning is commonly used. We find that pruning a model using a common training accelerator with large systolic…

Machine Learning · Computer Science 2020-04-29 Sangkug Lym , Mattan Erez

Large language models (LLMs) have demonstrated exceptional proficiency in understanding and generating human language, but efficient inference on resource-constrained embedded devices remains challenging due to large model sizes and…

Hardware Architecture · Computer Science 2025-07-15 Weihong Xu , Haein Choi , Po-kai Hsu , Shimeng Yu , Tajana Rosing