Related papers: Achieving short high-quality gate-all-around struc…

We analyze the performance of a recently reported Ge/Si core/shell nanowire transistor using a semiclassical, ballistic transport model and an sp3s*d5 tight-binding treatment of the electronic structure. Comparison of the measured…

We propose two schemes of field-effect transistor based on gapped armchair graphene nanoribbons connected to metal leads, by introducing sidearms or on-site gate voltages. We make use of the band gap to reach excellent switch-off character.…

We theoretically investigate nonlinear ballistic thermoelectric transport in a superlattice-structured nanowire. By a special choice of nonuniform widths of the superlattice barriers - analogous to anti-reflection coating in optical systems…

We present a theoretical framework for the calculation of charge transport through nanowire-based Schottky-barrier field-effect transistors that is conceptually simple but still captures the relevant physical mechanisms of the transport…

Tunnel Field Effect Transistors (TFET) have extremely low leakage current, exhibit excellent subthreshold swing and are less susceptible to short channel effects. However, TFETs do face certain special challenges, particularly with respect…

Metallic nanoparticles offer possibilities to build basic electric devices with new functionality and improved performance. Due to the small volume and the resulting low self-capacitance, each single nanoparticle exhibits a high charging…

We develop a robust and versatile platform to define nanostructures at oxide interfaces via patterned top gates. Using LaAlO$_3$/SrTiO$_3$ as a model system, we demonstrate controllable electrostatic confinement of electrons to nanoscale…

In this paper we propose a modified structure of TFET incorporating ferroelectric oxide as the complementary gate dielectric operating in negative capacitance zone, called the Negative Capacitance Tunnel FET (NCTFET). The proposed device…

We report the observation of channel-width dependent enhancement in nanoscale field effect transistors containing lithographically-patterned silicon nanowires as the conduction channel. These devices behave as conventional…

We have fabricated carbon nanotube (CN) field-effect transistors with multiple, individually addressable gate segments. The devices exhibit markedly different transistor characteristics when switched using gate segments controlling the…

Semiconductor nanowires can be utilized to create quantum dot qubits. The formation of quantum dots is typically achieved by means of bottom gates created by a lift-off process. As an alternative, we fabricated flat buried bottom gate…

We propose an analytical device model for a graphene nanoribbon field-effect transistor (GNR-FET). The GNR-FET under consideration is based on a heterostructure which consists of an array of nanoribbons clad between the highly conducting…

Transistors, regardless of their size, rely on electrical gates to control the conductance between source and drain contacts. In atomic-scale transistors, this conductance is exquisitely sensitive to single electrons hopping via individual…

We have fabricated a sub-micron-sized structure consisting of an InAs-based 2DEG, two narrow Nb leads and a gate, where the indirect ballistic transport between the non-oppositely superconducting contacts can be controlled by the voltage…

We report on the successful synthesis and low-temperature electron transport investigations of a new form of material - Bi2O2Se semiconducting nanowires. Gate-tunable 0- and $\pi$-h/e (h is the Planck constant and e the elementary charge)…

We present a simple and scalable technique for the fabrication of solution processed & local gated carbon nanotube field effect transistors (CNT-FETs). The approach is based on directed assembly of individual single wall carbon nanotube…

A common issue in low temperature measurements of enhancement-mode metal-oxide-semiconductor (MOS) field-effect transistors (FETs) in the low electron density regime is the high contact resistance dominating the device impedance. In that…

In this paper, we have proposed a new design technique of BCD Adder using newly constructed reversible gates are based on NMOS with pass transistor gates, where the conventional reversible gates are based on CMOS with transmission gates. We…

In this paper, we have worked out a pseudo two dimensional (2D) analytical model for surface potential and drain current of a long channel p-type Dual Material Gate (DMG) Gate All-Around (GAA) nanowire Tunneling Field Effect Transistor…

Quantum mechanical effects induced by the miniaturization of complementary metal-oxide-semiconductor (CMOS) technology hamper the performance and scalability prospects of field-effect transistors. However, those quantum effects, such as…