Related papers: Getting to the Bottom of Negative Capacitance FETs
Power dissipation is known as the most notable limiting factor in all nano-electronic design techniques including Quantum-dot Cellular Automata (QCA). The familiar reversible computing approach is used as a reasonably reliable solution,…
Bottom-up synthesized GNRs and GNR heterostructures have promising electronic properties for high performance field effect transistors (FETs) and ultra-low power devices such as tunnelling FETs. However, the short length and wide band gap…
We introduce a new method for inverse design of nanophotonic devices which guarantees that resulting designs satisfy strict length scale constraints - including minimum width and spacing constraints required by commercial semiconductor…
Several nanoelectronic devices have been already proved. However, no architecture which makes use of them provides a feasible opportunity to build medium/large systems. Nanoarchitecture proposals only solve a small part of the problems…
We analyze the low-energy properties of superconductors near the onset of accidental nodes, i.e. zeroes of the gap function not enforced by symmetry. The existence of such nodes has been motivated by recent experiments suggesting a…
A simple scalable scheme is reported for fabricating suspended carbon nanotube field effect transistors (CNT-FETs) without exposing pristine as-grown carbon nanotubes to subsequent chemical processing. Versatility and ease of the technique…
Compute-in-memory (CiM) is a promising solution for addressing the challenges of artificial intelligence (AI) and the Internet of Things (IoT) hardware such as 'memory wall' issue. Specifically, CiM employing nonvolatile memory (NVM)…
The gamut of todays internet-connected embedded devices has led to increased concerns regarding the security and confidentiality of data. Most internet-connected embedded devices employ mathematically secure cryptographic algorithms to…
As the conventional silicon metal-oxide-semiconductor field-effect transistor (MOSFET) approaches its scaling limits; many novel device structures are being extensively explored. Among them, the silicon nanowire transistor (SNWT) has…
Nonequilibrium electron distribution in a superlattice subjected to a homogeneous electric field (biased superlattice with equipopulated levels) is studied within the tight-binding approximation, taking into account the scattering by…
Using micromagnets to enable electron spin manipulation in silicon qubits has emerged as a very popular method, enabling single-qubit gate fidelities larger than 99:9%. However, these micromagnets also apply stray magnetic field gradients…
The main promise of tunnel FETs (TFETs) is to enable supply voltage ($V_{DD}$) scaling in conjunction with dimension scaling of transistors to reduce power consumption. However, reducing $V_{DD}$ and channel length ($L_{ch}$) typically…
In conventional metal-oxide semiconductor (CMOS) electronics, the logic state of a device is set by a gate voltage (VG). The superconducting equivalent of such effect had remained unknown until it was recently shown that a VG can tune the…
Using accurate dissipative DFT-NEGF atomistic-simulation techniques within the Wannier-Function formalism, we give a fresh look at the possibility of sub-10 nm scaling for high-performance CMOS applications. We show that a combination of…
In this work we propose a fully experimental method to extract the barrier lowering in short-channel saturated MOSFETs using the Lundstrom backscattering transport model in a one sub-band approximation and carrier degeneracy. The knowledge…
In RF (Radio Frequency) domain, one of the limitations of using MEMS (Micro Electromechanical Systems) switching devices for medium power applications is RF power. Failure phenomena appear even for 500 mW. A design of MEMS switched…
In this work, we report implementation and performance evaluation of memristor-driven fundamental logic gates, including NOT, AND, NAND, OR, NOR, and XOR, and novel and optimized design of the sequential logic circuits, such as D flip-flop,…
Decoherence of quantum states is a major hurdle towards scalable and reliable quantum computing. Lower decoherence (i.e., higher fidelity) can alleviate the error correction overhead and obviate the need for energy-intensive noise reduction…
In semiconductor-based quantum technologies, the capability to shuttle charges between components is profoundly enabling. We numerically simulated various "conveyor-belt" shuttling scenarios for simple Si/SiO2 devices, explicitly modelling…
The voltage dependence of nanoelectromechanical effects in a system where the quantized mechanical vibrations of a quantum dot are coupled to coherent tunneling of electrons through a single level in the dot is studied. It is found that…