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Recent nano-technological advances enable the Monolithic 3D (M3D) integration of multiple memory and logic layers in a single chip, allowing for fine-grained connections between layers and significantly alleviating main memory bottlenecks.…

The read channel in Flash memory systems degrades over time because the Fowler-Nordheim tunneling used to apply charge to the floating gate eventually compromises the integrity of the cell because of tunnel oxide degradation. While…

Information Theory · Computer Science 2014-03-19 Tsung-Yi Chen , Adam R. Williamson , Richard D. Wesel

This article summarizes key results of our work on experimental characterization and analysis of latency variation and latency-reliability trade-offs in modern DRAM chips, which was published in SIGMETRICS 2016, and examines the work's…

Current portable memory device relies heavily on flash memory technology for its implementation. New generation of non-volatile memory is likely to replace floating gates, charge-trapping memory currently still suffering from inadequate…

Applied Physics · Physics 2023-03-27 Yifan Hu

The read channel of a Flash memory cell degrades after repetitive program and erase (P/E) operations. This degradation is often modeled as a function of the number of P/E cycles. In contrast, this paper models the degradation as a function…

Information Theory · Computer Science 2016-10-13 Haobo Wang , Nathan Wong , Tsung-Yi Chen , Richard D. Wesel

Due to increasing cache sizes and large leakage consumption of SRAM device, conventional SRAM caches contribute significantly to the processor power consumption. Recently researchers have used non-volatile memory devices to design caches,…

Hardware Architecture · Computer Science 2014-05-01 Sparsh Mittal

Dynamic Random Access Memory (DRAM) is the de-facto choice for main memory devices due to its cost-effectiveness. It offers a larger capacity and higher bandwidth compared to SRAM but is slower than the latter. With each passing generation,…

Hardware Architecture · Computer Science 2022-01-19 Kaustav Goswami , Hemanta Kumar Mondal , Shirshendu Das , Dip Sankar Banerjee

Storage-class memory (SCM) combines the benefits of a solid-state memory, such as high-performance and robustness, with the archival capabilities and low cost of conventional hard-disk magnetic storage. Among candidate solid-state…

Hardware Architecture · Computer Science 2017-04-19 Wonil Choi , Mohammad Arjomand , Myoungsoo Jung , Mahmut Kandemir

This article features extended summaries and retrospectives of some of the recent research done by our group, SAFARI, on (1) understanding, characterizing, and modeling various critical properties of modern DRAM and NAND flash memory, the…

Hardware Architecture · Computer Science 2018-05-31 Onur Mutlu , Saugata Ghose , Rachata Ausavarungnirun

Flash-based disk caches, for example Bcache and Flashcache, has gained tremendous popularity in industry in the last decade because of its low energy consumption, non-volatile nature and high I/O speed. But these cache systems have a worse…

Operating Systems · Computer Science 2023-11-16 Chaos Dong , Fang Wang , Jianshun Zhang

Main memories play an important role in overall energy consumption of embedded systems. Using conventional memory technologies in future designs in nanoscale era causes a drastic increase in leakage power consumption and temperature-related…

Hardware Architecture · Computer Science 2019-12-16 Salman Onsori , Arghavan Asad , Kaamran Raahemifar , Mahmood Fathy

The error correcting performance of multi-level-cell (MLC) NAND flash memory is closely related to the block length of error correcting codes (ECCs) and log-likelihood-ratios (LLRs) of the read-voltage thresholds. Driven by this issue, this…

Information Theory · Computer Science 2020-04-14 Cheng Wang , Kang Wei , Lingjun Kong , Long Shi , Zhen Mei , Jun Li , Kui Cai

The rapid growth of LLMs demands high-throughput, memory-capacity-intensive inference on resource-constrained edge devices, where single-batch decoding remains fundamentally memory-bound. Existing out-of-core GPU-based and SSD-like…

Hardware Architecture · Computer Science 2026-04-29 Mingbo Hao , Changwei Yan , Haoyu Cui , Zhihao Yan , Yizhi Ding , Zhangrui Qian , Weiwei Shan

The scaling of high density NOR Flash memory devices with multi level cell (MLC) hits the reliability break wall because of relatively high intrinsic bit error rate (IBER). The chip maker companies offer two solutions to meet the output bit…

Information Theory · Computer Science 2013-06-25 Daniel L. Miller

For large scale distributed storage systems, flash memories are an excellent choice because flash memories consume less power, take lesser floor space for a target throughput and provide faster access to data. In a traditional distributed…

Distributed, Parallel, and Cluster Computing · Computer Science 2013-02-26 Srimugunthan , K. Gopinath

Storing digital information, ensuring the accuracy, steady and uninterrupted access to the data are considered as fundamental challenges in enterprise-class organizations and companies. In recent years, new types of storage systems such as…

Other Computer Science · Computer Science 2014-05-12 Arash Batni , Farshad Safaei

The NAND flash memory channel is corrupted by different types of noises, such as the data retention noise and the wear-out noise, which lead to unknown channel offset and make the flash memory channel non-stationary. In the literature,…

Information Theory · Computer Science 2024-10-10 Zhen Mei , Kui Cai , Long Shi , Jun Li , Li Chen , Kees A. Schouhamer Immink

Today, flash memory are strongly used in the embedded system domain. NAND flash memories are the building block of main secondary storage systems. Such memories present many benefits in terms of data density, I/O performance, shock…

Operating Systems · Computer Science 2012-09-03 Pierre Olivier , Jalil Boukhobza , Eric Senn

Recently introduced 3D vertical flash memory is expected to be a disruptive technology since it overcomes scaling challenges of conventional 2D planar flash memory by stacking up cells in the vertical direction. However, 3D vertical flash…

Information Theory · Computer Science 2015-09-16 Yongjune Kim , Robert Mateescu , Seung-Hwan Song , Zvonimir Bandic , B. V. K. Vijaya Kumar

The practical NAND flash memory suffers from various non-stationary noises that are difficult to be predicted. Furthermore, the data retention noise induced channel offset is unknown during the readback process. This severely affects the…

Information Theory · Computer Science 2019-07-10 Zhen Mei , Kui Cai , Xuan He