Related papers: A Driver ASIC for Scientific CCD Detectors Using 1…
We developed CdTe double-sided strip detectors (DSDs or cross strip detectors) and evaluated their spectral and imaging performance for hard X-rays and gamma-rays. Though the double-sided strip configuration is suitable for imagers with a…
A dedicated front-end electronics has been developed for the trigger chambers of the ALICE muon spectrometer which will work at the future LHC at CERN. These trigger chambers are based on RPCs (Resistive Plate Chambers) working in streamer…
This paper presents the first sub-10$\mu$W, sub-0.1% total harmonic distortion (THD) sinusoidal current generator (CG) integrated circuit (IC) that is capable of 20kHz output for the bio-impedance (Bio-Z) sensing applications. To benefit…
Qubit control electronics composed of CMOS circuits are of critical interest for next generation quantum computing systems. A CMOS-based application specific integrated circuit (ASIC) fabricated in 14nm FinFET technology was used to…
- This paper describes a pipeline analog-to-digital converter is implemented for high speed camera. In the pipeline ADC design, prime factor is designing operational amplifier with high gain so ADC have been high speed. The other advantage…
We present a programmable time alignment scheme used in an ASIC for the ATLAS forward muon trigger development. The scheme utilizes regenerated clocks with programmable phases to compensate for the timing offsets introduced by different…
The continued advancements of Silicon Photomultipliers (SiPMs) have made them viable photosensors for low recoil energy Pulse Shape Discrimination (PSD) between fast neutron and gamma interactions when coupled to an appropriate…
The China ADS (C-ADS) project is proposed to build a 1000 MW Accelerator Driven sub-critical System around 2032. The accelerator will work in CW mode with 10 mA in beam current and 1.5 GeV in final beam energy. The linac is composed of two…
We present the characterization of the CCD system developed for the ADFOSC instrument on the 3.6m Devasthal Optical Telescope (DOT). We describe various experiments performed to tune the CCD controller parameters to obtain optimum…
We present characterization results and performance of a prototype Multiple-Amplifier Sensing (MAS) silicon charge-coupled device (CCD) sensor with 16 channels potentially suitable for faint object astronomical spectroscopy and low-signal,…
Superconducting quantum computers (SQC) can solve some specific problems which are deeply believed to be intractable for classical computers. The control and measurement of qubits can't go on without the synchronous operation of…
The SALSA chip is a future readout ASIC foreseen for the MPGD detectors, developed in the framework of the EIC collider project, to equip the MPGD trackers of the EPIC experiment. It is designed to be versatile, to be adapted to other…
We present a gigabit transceiver prototype Application Specific Integrated Circuit (ASIC), GBCR, for the ATLAS Inner Tracker (ITk) Pixel detector readout upgrade. GBCR is designed in a 65-nm CMOS technology and consists of four upstream…
TIGER (Turin Integrated Gem Electronics for Readout) is a mixed-mode front-end ASIC developed to readout the new inner tracking detector of the BESIII experiment, carried out at BEPCII in Beijing. The detector is planned to be installed…
The single photon source is an important part of the quantum key distribution (QKD) system. At present, the single photon source is large in size and complex in structure for a lot of discrete components which are used. The miniaturization…
The Compact Linear Collider (CLIC) is a concept for a future linear collider that would provide e$^+$e$^-$ collisions at up to 3 TeV. The physics aims require a detector system with excellent jet energy and track momentum resolution, highly…
For the CLIC two-beam scheme, a high-current, long-pulse drive beam is required for RF power generation. Taking advantage of the 3 GHz klystrons available at the LEP injector once LEP stops, a 180 MeV electron accelerator is being…
The paper presents the design and measurement results of a transient waveform recording ASIC based on the Switched Capacitor Array (SCA) architecture. This 0.18 {\mu}m CMOS prototype device contains two channels and each channel employs a…
We report on the development of a front-end ASIC for silicon-strip detectors of the J-PARC Muon g-2/EDM experiment. This experiment aims to measure the muon anomalous magnetic moment and electric dipole moment precisely to explore new…
Three generations of full-custom analog integrated circuits designed for low-power, high-speed sampling of Radio-Frequency (RF) transients in excess of the Nyquist minimum have been developed. These 0.25$\mu m$ CMOS devices are denoted the…