Related papers: A Driver ASIC for Scientific CCD Detectors Using 1…

We have developed a new set of Application-Specific Integrated Circuits (ASICs) of the TARGET family (CTC and CT5TEA), designed for the readout of signals from photosensors in cameras of Imaging Atmospheric Cherenkov Telescopes (IACTs) for…

Artificial Intelligence is poised to transform the design of complex, large-scale detectors like the ePIC at the future Electron Ion Collider. Featuring a central detector with additional detecting systems in the far forward and far…

The concept of capacitive coupling between sensors and readout chips is under study for the vertex detector at the proposed high-energy CLIC electron positron collider. The CLICpix Capacitively Coupled Pixel Detector (C3PD) is an active…

Time and charge measurements over a large dynamic range from 1 Photo Electron (P.E.) to 4000 P.E. are required for the Water Cherenkov Detector Array (WCDA), which is one of the key components in the Large High Altitude Air Shower…

The rate of coherence loss is lower for a qubit under the Rabi drive than a freely evolving qubit $T_{2}^{\rm{Rabi}}>T_{2}^*$. Building on this principle, concatenated continuous driving (CCD) keeps the qubit under continuous drive to…

This paper describes a pipelined analog-to-digital converter (ADC) employing a power and area efficient architecture. The adjacent stages of a pipeline share operational amplifiers. In order to keep accuracy of the amplifiers in the first…

This paper presents the design and analysis of a wearable CMOS biosensor with three different designs of energy-resolution scalable time-based resistance to digital converters (RDC), targeted towards either minimizing the energy/conversion…

Silicon Drift Detectors (SDD) equip the two central layers of the Inner Tracking System of the ALICE experiment at the LHC. Main results of systematic studies of detector performance including noise, gain, drift speed and charge collection…

This paper describes a 8 bits, 20 Msamples/s pipeline analog-to-digital converter implemented in 0.6 \mu m CMOS technology with a total power dissipation of 75.47 mW. Circuit techniques used include a precise comparator, operational…

We have been developing a serializer application-specific integrated circuit (ASIC) based on a commercial 0.25-{\mu}m silicon-on-sapphire (SOS) CMOS technology for the ATLAS liquid argon calorimeter front-end electronics upgrade. The first…

We present the characterization of a readout Application-Specific Integrated Circuit (ASIC) for the CMS Endcap Timing Layer (ETL) of the High-Luminosity LHC upgrade with charge injection. The ASIC, named ETROC and developed in a 65 nm CMOS…

We report on a large active area (15x15mm2), high channel density (470 pixels/mm2), self-triggering CMOS analog chip that we have developed as pixelized charge collecting electrode of a Micropattern Gas Detector. This device, which…

The oversampling technique has been shown to increase the SNR and is used in many high-performance systems such as in the ADC for audio and DAT systems. This paper presents the design of the decimation and it's VLSI implementation which is…

The Address in Real Time Data Driver Card (ADDC) is designed to transmit the trigger data in the Micromegas detector of the ATLAS New Small Wheel (NSW) upgrade. The ART signals are generated by the front end ASIC, named VMM chip, to…

Superconductor electronics fabrication technology developed at MIT Lincoln Laboratory enables the development of VLSI digital circuits with millions of Josephson junctions per square centimeter. However, conventional DC and multi-phase AC…

To assess the viability of a shallow-depth neutrino detector, a Cosmic Muon Veto Detector (CMVD) is being constructed on top of the stack of Resistive Plate Chamber (RPC) detectors at TIFR, Mumbai. The CMVD employs extruded plastic…

This manuscript describes a radiation-hardened current-mode delta-sigma ADC fabricated in a standard 130 nm CMOS technology and qualified for total ionizing doses up to 100 Mrad. The operational signal range achieved with a 100 s…

The Compact Linear Collider (CLIC) is a TeV-scale high-luminosity linear e$^+$e$^-$ collider studied by the international CLIC and CLICdp collaborations. CLIC uses a two-beam acceleration scheme, in which normal-conducting high-gradient 12…

We present the first single-input multiple-output (SIMO) receiver ASIC that jointly performs jammer mitigation, channel estimation, and data detection. The ASIC implements a recent algorithm called siMultaneous mitigAtion, Estimation, and…

AXIS, a Probe mission concept now in a Phase A study, will provide transformative studies of high-energy astrophysical phenomena thanks to its high-resolution X-ray spectral imaging. These capabilities are enabled by improvements to the…