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Quantum Random Access Memory (QRAM) is a critical component for loading classical data into quantum computers. While constructing a practical QRAM presents several challenges, including the impracticality of an infinitely large QRAM size…

SRAM-based compute-in-memory (CIM) offers high computational density and energy efficiency for deep neural network (DNN) accelerators, but its limited capacity causes on/off-chip data movement overhead for large DNN models. Existing CIM…

Hardware Architecture · Computer Science 2026-04-21 Chenhao Xue , Yukun Wang , An Guo , Yuhui Shi , Jinwei Zhou , Xiping Dong , Yihan Yin , Yuanpeng Zhang , Tianyu Jia , Wei Gao , Qiang Wu , Xin Si , Jun Yang , Guangyu Sun

Predictable execution time upon accessing shared memories in multi-core real-time systems is a stringent requirement. A plethora of existing works focus on the analysis of Double Data Rate Dynamic Random Access Memories (DDR DRAMs), or…

Hardware Architecture · Computer Science 2018-10-17 Mohamed Hassan

In this paper, we first show that increases in beam size, even for small-sized LLMs (1B-7B params), require extensive GPU usage, leading to up to 80% of recurring crashes due to memory overloads in LLM-based APR. Seemingly simple solutions…

Software Engineering · Computer Science 2025-10-20 Thanh Le-Cong , Bach Le , Toby Murray

Elliptic curve cryptography (ECC) is widely used in security applications such as public key cryptography (PKC) and zero-knowledge proofs (ZKP). ECC is composed of modular arithmetic, where modular multiplication takes most of the…

Hardware Architecture · Computer Science 2024-02-23 Jonathan Ku , Junyao Zhang , Haoxuan Shan , Saichand Samudrala , Jiawen Wu , Qilin Zheng , Ziru Li , JV Rajendran , Yiran Chen

Resistive memories have limited lifetime caused by limited write endurance and highly non-uniform write access patterns. Two main techniques to mitigate endurance-related memory failures are 1) wear-leveling, to evenly distribute the writes…

Hardware Architecture · Computer Science 2020-10-07 Leonid Yavits , Lois Orosa , Suyash Mahar , João Dinis Ferreira , Mattan Erez , Ran Ginosar , Onur Mutlu

Generational improvements to commodity DRAM throughout half a century have long solidified its prevalence as main memory across the computing industry. However, overcoming today's DRAM technology scaling challenges requires new solutions…

Hardware Architecture · Computer Science 2024-01-30 Minesh Patel , Taha Shahroodi , Aditya Manglik , Abdullah Giray Yağlıkçı , Ataberk Olgun , Haocong Luo , Onur Mutlu

Poor DRAM technology scaling over the course of many years has caused DRAM-based main memory to increasingly become a larger system bottleneck. A major reason for the bottleneck is that data stored within DRAM must be moved across a…

Hardware Architecture · Computer Science 2018-02-02 Saugata Ghose , Kevin Hsieh , Amirali Boroumand , Rachata Ausavarungnirun , Onur Mutlu

Processing-using-DRAM has been proposed for a limited set of basic operations (i.e., logic operations, addition). However, in order to enable full adoption of processing-using-DRAM, it is necessary to provide support for more complex…

Due to the small size of nanoscale devices, they are highly prone to process disturbances which results in manufacturing defects. Some of the defects are randomly distributed throughout the nanodevice layer. Other disturbances tend to be…

Hardware Architecture · Computer Science 2019-07-11 Hossein Pourmeidani , Mehdi Habibi

In recent years, the energy consumption of computing systems has increased and a large fraction of this energy is consumed in main memory. Towards this, researchers have proposed use of non-volatile memory, such as phase change memory…

Hardware Architecture · Computer Science 2013-09-17 Sparsh Mittal

Dynamic Random Access Memory (DRAM) is pervasive in computer systems. Cell vulnerabilities caused by unintended phenomena (forced retention failure, latency alteration, rowhammer and rowpress) lead to unintended bit flips in memory. These…

Cryptography and Security · Computer Science 2026-03-20 Zilong Hu , Hongming Fei , Prosanta Gope , Jack Miskelly , Owen Millwood , Biplab Sikdar

Real-time and cyber-physical systems need to interact with and respond to their physical environment in a predictable time. While multicore platforms provide incredible computational power and throughput, they also introduce new sources of…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-06-29 Ayoosh Bansal , Jayati Singh , Yifan Hao , Jen-Yang Wen , Renato Mancuso , Marco Caccamo

Oblivious RAM (ORAM) hides the memory access patterns, enhancing data privacy by preventing attackers from discovering sensitive information based on the sequence of memory accesses. The performance of ORAM is often limited by its inherent…

Cryptography and Security · Computer Science 2024-11-11 Haojie Ye , Yuchen Xia , Yuhan Chen , Kuan-Yu Chen , Yichao Yuan , Shuwen Deng , Baris Kasikci , Trevor Mudge , Nishil Talati

Phase change memory (PCM) has recently emerged as a promising technology to meet the fast growing demand for large capacity memory in computer systems, replacing DRAM that is impeded by physical limitations. Multi-level cell (MLC) PCM…

Hardware Architecture · Computer Science 2017-11-27 Seyed Mohammad Seyedzadeh , Alex K. Jones , Rami Melhem

The effectiveness of deep neural networks (DNN) in vision, speech, and language processing has prompted a tremendous demand for energy-efficient high-performance DNN inference systems. Due to the increasing memory intensity of most DNN…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-10-15 Skanda Koppula , Lois Orosa , Abdullah Giray Yağlıkçı , Roknoddin Azizi , Taha Shahroodi , Konstantinos Kanellopoulos , Onur Mutlu

The last decade has witnessed the breakthrough of deep neural networks (DNNs) in many fields. With the increasing depth of DNNs, hundreds of millions of multiply-and-accumulate (MAC) operations need to be executed. To accelerate such…

Hardware Architecture · Computer Science 2022-11-29 Amro Eldebiky , Grace Li Zhang , Georg Boecherer , Bing Li , Ulf Schlichtmann

Coherent parity check (CPC) codes are a new framework for the construction of quantum error correction codes that encode multiple qubits per logical block. CPC codes have a canonical structure involving successive rounds of bit and phase…

Quantum Physics · Physics 2018-06-08 Joschka Roffe , David Headley , Nicholas Chancellor , Dominic Horsman , Viv Kendon

DRAM is the primary technology used for main memory in modern systems. Unfortunately, as DRAM scales down to smaller technology nodes, it faces key challenges in both data integrity and latency, which strongly affect overall system…

Hardware Architecture · Computer Science 2023-03-15 Hasan Hassan

Emerging applications of control, estimation, and machine learning, ranging from target tracking to decentralized model fitting, pose resource constraints that limit which of the available sensors, actuators, or data can be simultaneously…

Optimization and Control · Mathematics 2020-12-15 Vasileios Tzoumas , Ali Jadbabaie , George J. Pappas