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Current computational systems are heterogeneous by nature, featuring a combination of CPUs and GPUs. As the latter are becoming an established platform for high-performance computing, the focus is shifting towards the seamless programming…

Distributed, Parallel, and Cluster Computing · Computer Science 2015-10-23 Fábio Soldado , Fernando Alexandre , Hervé Paulino

Peak breaking Matrix Multiplication is a promising technique to improve the performance of DL, especially in LLM training and inference. We present FalconGEMM, a cross-platform framework that automates the deployment, optimization, and…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-05-13 Honglin Zhu , Jiaping Cao , Jiang Shao , Siyuan Feng , Qian Qiu , Peng Chen , Xu Zhang , Yixian Zhou , Man Lung Yiu , Guang Ji , Minwen Deng , Wenxi Zhu , Jintao Meng

Exascale computing systems will exhibit high degrees of hierarchical parallelism, with thousands of computing nodes and hundreds of cores per node. Efficiently exploiting hierarchical parallelism is challenging due to load imbalance that…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-07-29 Jonas H. Müller Korndörfer , Ahmed Eleliemy , Ali Mohammed , Florina M. Ciorba

The rapid scaling of large language models (LLMs) has unveiled critical limitations in current hardware architectures, including constraints in memory capacity, computational efficiency, and interconnection bandwidth. DeepSeek-V3, trained…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-12-24 Chenggang Zhao , Chengqi Deng , Chong Ruan , Damai Dai , Huazuo Gao , Jiashi Li , Liyue Zhang , Panpan Huang , Shangyan Zhou , Shirong Ma , Wenfeng Liang , Ying He , Yuqing Wang , Yuxuan Liu , Y. X. Wei

CXL has been the emerging technology for expanding memory for both the host CPU and device accelerators with load/store interface. Extending memory coherency to the PCIe root complex makes the codesign more flexible in that you can access…

Hardware Architecture · Computer Science 2023-09-11 Yiwei Yang

The ISO C++17 standard introduces \emph{parallel algorithms}, a parallel programming model promising portability across a wide variety of parallel hardware including multi-core CPUs, GPUs, and FPGAs. Since 2019, the NVIDIA HPC SDK compiler…

Mathematical Software · Computer Science 2023-02-20 Uzmar Gomez , Gonzalo Brito Gadeschi , Tobias Weinzierl

Large language model (LLM) inference is limited by high computational cost and memory bandwidth demands, making deployment on heterogeneous many-core processors challenging. Taking the MT-3000 processor used in the Tianhe supercomputer as…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-05-26 Yao Lu , Zhongzhi Luan , Gen Li , Jiaxing Qi , Shiqing Ma , Bin Han , Shizhe Shang , Hailong Yang , Depei Qian

Large language model (LLM) decoding suffers from high latency due to fragmented execution across operators and heavy reliance on off-chip memory for data exchange and reduction. This execution model limits opportunities for fusion and…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-08-27 Xinhao Luo , Zihan Liu , Yangjie Zhou , Shihan Fang , Ziyu Huang , Yu Feng , Chen Zhang , Shixuan Sun , Zhenzhe Zheng , Jingwen Leng , Minyi Guo

The increasing adoption of large language models (LLMs) on heterogeneous computing platforms poses significant challenges to achieving high inference efficiency. To address these efficiency bottlenecks across diverse platforms, this paper…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-02-06 Yaozheng Zhang , Wei Wang , Jie Kong , Jiehan Zhou , Xianwei Zhang , Huanqing Cui , Han Bao , Yuhai Liu

We introduce SparkCL, an open source unified programming framework based on Java, OpenCL and the Apache Spark framework. The motivation behind this work is to bring unconventional compute cores such as FPGAs/GPUs/APUs/DSPs and future core…

Distributed, Parallel, and Cluster Computing · Computer Science 2015-05-06 Oren Segal , Philip Colangelo , Nasibeh Nasiri , Zhuo Qian , Martin Margala

Future experiments in high-energy physics will pose stringent requirements to computing, in particular to real-time data processing. As an example, the CBM experiment at FAIR Germany intends to perform online data selection exclusively in…

Computational Physics · Physics 2020-02-06 V. Singhal , S. Chattopadhyay , V. Friese

Deployment of modern TinyML tasks on small battery-constrained IoT devices requires high computational energy efficiency. Analog In-Memory Computing (IMC) using non-volatile memory (NVM) promises major efficiency improvements in deep neural…

Hardware Architecture · Computer Science 2022-01-05 Angelo Garofalo , Gianmarco Ottavi , Francesco Conti , Geethan Karunaratne , Irem Boybat , Luca Benini , Davide Rossi

Heterogeneous multi-core architectures combine on a single chip a few large, general-purpose host cores, optimized for single-thread performance, with (many) clusters of small, specialized, energy-efficient accelerator cores for…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-05-12 Luca Colagrande , Luca Benini

MPI+Threads, embodied by the MPI/OpenMP hybrid programming model, is a parallel programming paradigm where threads are used for on-node shared-memory parallelization and MPI is used for multi-node distributed-memory parallelization. OpenMP…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-01-31 Hui Zhou , Ken Raffenetti , Junchao Zhang , Yanfei Guo , Rajeev Thakur

Heterogeneity has become a mainstream architecture design choice for building High Performance Computing systems. However, heterogeneity poses significant challenges for achieving performance portability of execution. Adapting a program to…

Programming Languages · Computer Science 2023-03-17 Giorgis Georgakoudis , Konstantinos Parasyris , Chunhua Liao , David Beckingsale , Todd Gamblin , Bronis de Supinski

Unlike traditional PCIe-based FPGA accelerators, heterogeneous SoC-FPGA devices provide tighter integrations between software running on CPUs and hardware accelerators. Modern heterogeneous SoC-FPGA platforms support multiple I/O cache…

Hardware Architecture · Computer Science 2019-08-06 Seung Won Min , Sitao Huang , Mohamed El-Hadedy , Jinjun Xiong , Deming Chen , Wen-mei Hwu

The deployment of large language models (LLMs) presents significant challenges due to their enormous memory footprints, low arithmetic intensity, and stringent latency requirements, particularly during the autoregressive decoding stage.…

Hardware Architecture · Computer Science 2025-11-03 Cenlin Duan , Jianlei Yang , Rubing Yang , Yikun Wang , Yiou Wang , Lingkun Long , Yingjie Qi , Xiaolin He , Ao Zhou , Xueyan Wang , Weisheng Zhao

OpenCL for FPGA enables developers to design FPGAs using a programming model similar for processors. Recent works have shown that code optimization at the OpenCL level is important to achieve high computational efficiency. However, existing…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-02-06 Ji Liu , Abdullah-Al Kafi , Xipeng Shen , Huiyang Zhou

Many scientific computations need multi-node parallelism for matching up both space (memory) and time (speed) ever-increasing requirements. The use of GPUs as accelerators introduces yet another level of complexity for the programmer and…

Data movement is the dominating factor affecting performance and energy in modern computing systems. Consequently, many algorithms have been developed to minimize the number of I/O operations for common computing patterns. Matrix…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-01-26 Johannes de Fine Licht , Grzegorz Kwasniewski , Torsten Hoefler