Related papers: A Clock Synchronizer for Repeaterless Low Swing On…
Optical clock network requires the establishment of optical frequency transmission link between multiple optical clocks, utilizing narrow linewidth lasers. Despite achieving link noise levels of 10${^{-20}}$, the final accuracy is limited…
Blind synchronization constitutes a major challenge in realizing highly efficient ultra wide band (UWB) systems because of the short pulse duration which requires a fast synchronization algorithm to accommodate several asynchronous users.…
We introduce iQSync, a clock offset recovery method designed for implementation on low-level hardware, such as FPGAs or microcontrollers, for quantum key distribution (QKD). iQSync requires minimal memory, only a simple instruction set…
This paper addresses delay test for SOC devices with high frequency clock domains. A logic design for on-chip high-speed clock generation, implemented to avoid expensive test equipment, is described in detail. Techniques for on-chip clock…
We present a latch-based and PLL-free design of the voltage droop correction circuit of Lenzen, Fuegger, Kinali, and Wiederhake\cite{DroopJournal}. Such a circuit dynamically modifies the clock frequency of a digital clock for VLSI systems.…
Circadian rhythms are acquired through evolution to increase the chances for survival through synchronizing with the daylight cycle. Reliable synchronization is realized through two trade-off properties: regularity to keep time precisely,…
Coupled oscillator-based networks are an attractive approach for implementing hardware neural networks based on emerging nanotechnologies. However, the readout of the state of a coupled oscillator network is a difficult challenge in…
We consider the effect of asymmetric temporal delays in a system of two coupled Hopfield neurons. For couplings of opposite signs, a limit cycle emerges via a supercritical Hopf bifurcation when the sum of the delays reaches a critical…
In this work the open-plus-closed-loop (OPCL) method of synchronization is used in order to synchronize the systems from the Sprott's collection of the simplest chaotic systems. The method is general and we were looking for the simplest…
On-chip voltage regulation using distributed Digital Low Drop Out (LDO) voltage regulators has been identified as a promising technique for efficient power-management for emerging multi-core processors. Digital LDOs (DLDO) can offer low…
In this paper, we present a dual-channel serializer ASIC, LOCx2, and its pin-compatible backup, LOCx2-130, for detector front-end readout. LOCx2 is fabricated in a 0.25-um Silicon-on-Sapphire CMOS process and each channel operates at 5.12…
Radio channels at mmWave and sub-THz frequencies for 5G and 6G communications offer large channel bandwidths (hundreds of MHz to several GHz) to achieve multi-Gbps data rates. Accurate modeling of the radio channel for these wide bandwidths…
The mechanism of synchronization of oscillations in two identical coupled flow systems has beenstudied. The time (past the coupling onset) during which a synchronous oscillation regime is establisheddepends on the oscillation phase…
Event synchronisation is a ubiquitous task, with applications ranging from 5G technology to industrial automation and smart power grids. The emergence of quantum communication networks will further increase the demand for precise…
We present the first demonstration of a local oscillator (LO)-less digital signal processing (DSP)-free coherent receiver for high-capacity short distance optical links. Experimental results with an analog domain constant modulous algorithm…
We have commissioned the digital Low Level RF (LLRF) system for storage ring RF at Advanced Light Source at Lawrence Berkeley National Lab (LBNL). The system is composed of 42 synchronous sampling channels for feedback control, diagnostics,…
We experimentally demonstrate and numerically simulate a new adaptive method to maintain synchronization between coupled nonlinear chaotic oscillators, when the coupling between the systems is unknown and time-varying (e.g., due to…
Integrated optical transceivers, utilizing wavelength-division-multiplexing, offer a path forward for implementation of compact, high-bandwidth and energy-efficient interconnects for future data centers. Here we report the demonstration of…
This paper focuses on the design and implementation of an automatic synchronizing and protection relay to automate the synchronization process of a Distributed Energy Resource (DER) to the Main Grid. The proposed design utilize a…
In this work, we propose and demonstrate a module to linearly add an arbitrary amount of continuous (reset-free) phase delay to an optical signal. The proposed endless optical phase delay (EOPD) uses an optical IQ modulator and control…