Related papers: Low latency protocol for transmission of measureme…

We are developing a new readout board with a newer generation field-programmable gate array (FPGA) and the 10-gigabit ethernet to improve the performance and usability of the current readout board based on the 1-gigabit Ethernet. In this…

In order to follow up with mission-critical applications, new features need to be carried to satisfy a reliable communication with reduced latency. With this regard, this paper proposes a low latency cooperative transmission scheme, where…

With the rapid development of network protocol, TCP/IP has been widely applied in various OS systems because of its advantages of high-speed network transmission and standardization. Furthermore, TCP/IP has the functions of retransmission…

A 20 GHz LLRF system is being built using a two-board(RF Front End + ADC/DAC/FPGA) architecture. The RF Front End provides 8 down-converting channels and 3 up-converting channels (5.5-20 GHz RF to 0.05-3 GHz IF). Separate, phase locked,…

This paper discusses the present data acquisition system (DAQ) of the COMPASS experiment at CERN and presents development of a new DAQ. The new DAQ must preserve present data format and be able to communicate with FPGA cards. Parts of the…

Industrial Ethernet is a technology widely spread in factory floors and critical infrastructures where a high amount of data need to be collected and transported. Fiber optic networks at gigabit rates fit well with that type of environments…

Accurate and low-latency qubit state measurement is critical for trapped-ion quantum computing. While deep neural networks (DNNs) have been integrated to enhance detection fidelity, their latency performance on specific hardware platforms…

This paper presents the design and the realization of a hybrid wireless Gigabit Ethernet indoor communications system operating at 60 GHz. As the 60 GHz radio link operates only in a single-room configuration, an additional Radio over Fiber…

Cost-effective embedded systems necessitate utilizing the single-wire communication protocol for inter-chip communication, thanks to its reduced pin count in comparison to the multi-wire I2C or SPI protocols. However, current single-wire…

With the rapidly increasing number of deployed LTE femtocell base stations (FBS), energy consumption of femtocell networks has become a serious environmental issue. Therefore, energy-efficient protocols are needed to balance the trade-off…

The IEEE 802.15.4 is a wireless standard introduced for low power, low cost wireless communication with moderate data rates. In the next few years, it is expected that Low Rate Wireless Personal Area Networks (LR-WPAN) will be used in a…

Federated Learning (FL) has become a viable technique for realizing privacy-enhancing distributed deep learning on the network edge. Heterogeneous hardware, unreliable client devices, and energy constraints often characterize edge computing…

Setting up a large-scale wireless sensor network is challenging, as firmware must be distributed and trust between sensor nodes and a backend needs to be established. To perform this task efficiently, we propose an approach named Box, which…

This paper presents a comprehensive study and implementations onto FPGA device of an Expectation Propagation (EP)-based receiver for QPSK, 8-PSK, and 16-QAM. To the best of our knowledge, this is the first for this kind of receiver. The…

PANDA is one of the major experiments currently under construction at FAIR/Darmstadt. Its focus is physics with high intensity and high quality anti-proton beams with momenta up to 15 GeV/c. Event rates up to 20MHz, and a typical event size…

We present an overview of the 'ICE' hardware and software framework that implements large arrays of interconnected FPGA-based data acquisition, signal processing and networking nodes economically. The system was conceived for application to…

Powerful Forward Error Correction (FEC) schemes are used in optical communications to achieve bit-error rates below $10^{-15}$. These FECs follow one of two approaches: concatenation of simpler hard-decision codes or usage of inherently…

We present and characterize a modular, open-source system to perform feedback control experiments on configurations of atoms and molecules in arrays of optical tweezers. The system features a modular, cost-effective computer architecture…

Modern Digital radar systems with multiple digital beamforming capability are built of a large number of receivers and requires high-speed data interface links for transmission of receiver baseband data to processor units. High data…

The TRB hardware module is a multi-purpose Trigger and Readout Board with on-board DAQ functionality developed for the upgrade of the HADES experiment. It contains a single computer chip (Etrax) running Linux as a well as a 100 Mbit/s…