Related papers: A high precision TDC based on a multi-phase clock
With the new generation of the RPC, it is possible to work with induced signals of hundreds $\mu V$, hence the front-end electronics is an important and delicate part of the detector in order to get a detectable signal. The electronic chain…
Identifying light mesons which contain only up/down quarks (pions) from those containing a strange quark (kaons) over the typical meter length scales of a particle physics detector requires instrumentation capable of measuring flight times…
Time interleaved analog-to-digital conversion (TIADC) based on parallelism is an effective way to meet the requirement of the ultra-fast waveform digitizer beyond Gsps. Different methods to correct the mismatch errors among different…
A characterisation of the Timepix4 pixel front-end with a strong focus on timing performance is presented. Externally generated test pulses were used to probe the per-pixel time-to-digital converter (TDC) and measure the time-bin sizes by…
We introduce a novel direct calibration algorithm to address phase delay, gain, and offset mismatches in Analog-to-Digital Converter (ADC) time interleaving systems. These mismatches, common in high-speed data acquisition, degrade system…
The design and performance of wave union TDC implemented in a Lattice CertusPro-NX FPGA is discussed. This FPGA is available for radiation tolerant applications. The TDC is implemented with 16-channels and a 200 MHz reference clock. Each…
This paper presents several new structures to pursue high-resolution (< 2 ps) time-to-digital converters (TDCs) in Xilinx 20 nm UltraScale field-programmable gate arrays (FPGAs). The proposed TDCs combined the advantages of 1) our newly…
A dual-phase TPC (Time Projection Chamber) is more advanced in characterizing an event than a single-phase one because it can, in principle, reconstruct the 3D (X-Y-Z) image of the event, while a single-phase detector can only show a 2D…
The paper presents a system for measuring photon statistics and photon timing in the few-photon regime down to the single-photon level. The measurement system is based on superconducting nanowire single photon detectors and a…
We present the second prototype of a time-to-digital (TDC) ASIC for the upgrade of the ATLAS Monitored Drift Tube (MDT) detector for High-Luminosity LHC operations. Compared to the first prototype, triple modular redundancy has been…
.On the basis of requirement of CSNS, we designed a TDC chip with temperature compensation function in this paper, which employed TSMC 180nm process. Using delay unit bufx8 as the major method, delay lines in each level delayed input signal…
The upgrade of the ATLAS muon spectrometer for high-luminosity LHC requires new trigger and readout electronics for the various elements of the detector. We present the design of a time-to-digital converter (TDC) ASIC prototype for the…
A Time to Digital Converter (TDC) based system, to be used for most sub-detectors in the high-flux rare-decay experiment NA62 at CERN SPS, was built as part of the NA62 fully digital Trigger and Data AcQuisition system (TDAQ), in which the…
- This paper describes a pipeline analog-to-digital converter is implemented for high speed camera. In the pipeline ADC design, prime factor is designing operational amplifier with high gain so ADC have been high speed. The other advantage…
High-precision measurements are crucial for testing the fundamental laws of nature and for advancing the technological frontier. Clock interferometry, where particles with an internal clock are coherently split and recombined along two…
The paper deals with the task of optimal design of Analog to Digital Converters (ADCs). A general ADC is modeled as a causal discrete-time dynamical system with outputs taking values in a finite set, and its performance is defined as the…
The level crossing analog-to-digital converters are meant for the effective conversion of sparse signals by construction. In these converters, the bandwidth-power trade-off requires a re-design of the comparators which takes a lot of time…
We present a complete top-down design of a low-power multi-channel clock recovery circuit based on gated current-controlled oscillators. The flow includes several tools and methods used to specify block constraints, to design and verify the…
In TDC testing or timing system implementation tasks, it is often desirable to generate signal pulses with fine adjustable time intervals. In delay cell-based schemes, the time adjustment steps are limited by the propagation delays of the…
Tunable couplers in superconducting quantum computers have enabled fast and accurate two-qubit gates, with reported high fidelities over 99% in various architectures and gate implementation schemes. However, there are few tunable couplers…