Low Power 16-channel Wave Union TDC in a Radiation Tolerant FPGA

The design and performance of wave union TDC implemented in a Lattice CertusPro-NX FPGA is discussed. This FPGA is available for radiation tolerant applications. The TDC is implemented with 16-channels and a 200 MHz reference clock. Each channel is able to record at an event rate of > 1 MHz. The performance of the TDC is assessed over voltage and temperature. Typical TDC performance has a resolution of 10.9 ps. Typical INL is +/-3 LSB peak-to-peak. Typical DNL is (+1.13,-0.77) LSB. Typical differential performance between two channels is 20 ps (1-sigma).