A technique to enable frequency dependent power savings in a level crossing analog-to-digital converter
Signal Processing
2021-08-18 v1
Abstract
The level crossing analog-to-digital converters are meant for the effective conversion of sparse signals by construction. In these converters, the bandwidth-power trade-off requires a re-design of the comparators which takes a lot of time and effort to reach the application optimum point. Inspired by synchronous converters that have a dynamic power component that can be traded with bandwidth with the change of a clock frequency, a technique to allow such trade-off in the level crossing converter was developed. The resulting level crossing ADC has an input signal dependent dynamic power which can reach up to 42\% OFF time during the conversion of sine waves, achieving 45.5% power reduction in the simulated design with TSMC 180nm PDK.
Cite
@article{arxiv.2108.07566,
title = {A technique to enable frequency dependent power savings in a level crossing analog-to-digital converter},
author = {Lucas Moura Santana and Duarte Lopes de Oliveira and Lester de Abreu Faria},
journal= {arXiv preprint arXiv:2108.07566},
year = {2021}
}