Related papers: Self-consistent Capacitance-Voltage Characterizati…
As we move beyond the era of transistor miniaturization, back-end-of-line-compatible transistors that can be stacked monolithically in the third dimension promise improved performance for low-power electronics. In advanced transistor…
High performance InGaAs gate-all-around (GAA) nanowire MOSFETs with channel length (Lch) down to 20nm have been fabricated by integrating a higher-k LaAlO3-based gate stack with an equivalent oxide thickness of 1.2nm. It is found that…
A simulation methodology for ultra-scaled InAs quantum well field effect transistors (QWFETs) is presented and used to provide design guidelines and a path to improve device performance. A multiscale modeling approach is adopted, where…
Self-heating in surrounding gate transistors can degrade its on-current performance and reduce lifetime. If a transistor heats/cools with time-constants less than the inverse of the operating frequency, a predictable, frequency-independent…
We show simultaneous p and n type carrier injection in bilayer graphene channel by varying the longitudinal bias across the channel and the top gate voltage. The top gate is applied electrochemically using solid polymer electrolyte and the…
We have performed numerical modeling of dual-gate ballistic n-MOSFET's with channel length of the order of 10 nm, including the effects of quantum tunneling along the channel and through the gate oxide. Our analysis includes a…
Temperature-dependent I-V and C-V spectroscopy of single InAs nanowire field-effect transistors were utilized to directly shed light on the intrinsic electron transport properties as a function of nanowire radius. From C-V…
We present a novel reconfigurable metal-oxide-semiconductor multi-gate transistor that can host a quadruple quantum dot in silicon. The device consist of an industrial quadruple-gate silicon nanowire field-effect transistor. Exploiting the…
Dissipation is ubiquitous in quantum systems, and its interplay with fluctuations is critical to maintaining quantum coherence. We experimentally investigate the dissipation dynamics in single-walled carbon nanotubes coupled to…
We present a capacitance-voltage study for arrays of vertical InAs nanowires. MOS capacitors are obtained by insulating the nanowires with a conformal 10nm HfO2 layer and using a top Cr/Au metallization as one of the capacitor's electrodes.…
We develop a robust and versatile platform to define nanostructures at oxide interfaces via patterned top gates. Using LaAlO$_3$/SrTiO$_3$ as a model system, we demonstrate controllable electrostatic confinement of electrons to nanoscale…
For the development of reliable vertical GaN transistors, a detailed analysis of the robustness of the gate stack is necessary, as a function of the process parameters and material properties. To this aim, we report a detailed analysis of…
We have fabricated a Cooper-pair transistor (CPT) with parameters such that for appropriate voltage biases, the sub-gap charge transport takes place via slow tunneling of quasiparticles that link two Josephson-coupled charge manifolds. In…
Nano-membrane tri-gate beta-gallium oxide (\b{eta}-Ga2O3) field-effect transistors (FETs) on SiO2/Si substrate fabricated via exfoliation have been demonstrated for the first time. By employing electron beam lithography, the minimum-sized…
Recently, short channel effects (SCE) and power consumption dissipation problems pose big challenges which need imperative actions to be taken to deal with for field effect transistor to further scale down as semiconductor technology enters…
Nanofluidic ionic transistors typically require gate voltages above 1 V and operate only at sub millimolar ionic strengths, limiting their biocompatible applications. We demonstrate ionic transistors consisting of single sub 10 nm nanopores…
We report low-temperature electrical transport studies of molecule-scale silicon nanowires. Individual nanowires exhibit well-defined Coulomb blockade oscillations characteristic of charge addition to a single nanostructure with length…
In this paper, an analytical predictive model of the negative capacitance (NC) effect in symmetric long channel double-gate junctionless transistor is proposed based on a charge-based model. In particular, we have investigated the effect of…
The electron transport through the triple-barrier resonant tunnelling diode (TBRTD) have been studied by the self-consistent numerical method for the Wigner-Poisson problem. The electron flow through the TBRTD can be controlled by the gate…
In gate-defined quantum dot systems, the conductance change of electrostatically coupled sensor dots allows the observation of the quantum dots' charge and spin states. Therefore, the sensor dot must be optimally sensitive to changes in its…